This paper presents a fully differential 12-bit SAR ADC developed for high-voltage CMOS sensors. The converter has been designed in compliance with low power consumption, high resolution and low material budget requirements. A merged capacitor switching method is employed to decrease power consumption and the capacitor array has been split up into two sub-DACs in order to reduce the area. The prototype has been implemented in a 110-nm CMOS technology. With a power supply of 1.2 V and a 100 MHz clock, simulations show an ENOB 9.87 of and a SFDR of 73.42 dB. The power consumption of the ADC is 513 uW while the Figure of Merit (FOM) results 54.8 fJ/conv-step. The final chip includes also a calibration engine to minimize the capacitor mismatch effect thus further improving the resolution.

A 12-bit 100 MHz SAR ADC in 110-nm CMOS for MAPSs / Tedesco, Silvia. - ELETTRONICO. - (2021), pp. 252-255. ((Intervento presentato al convegno SMACD / PRIME 2021; International Conference on SMACD and 16th Conference on PRIME tenutosi a online nel 19-22 Luglio 2021.

A 12-bit 100 MHz SAR ADC in 110-nm CMOS for MAPSs

Silvia Tedesco
2021

Abstract

This paper presents a fully differential 12-bit SAR ADC developed for high-voltage CMOS sensors. The converter has been designed in compliance with low power consumption, high resolution and low material budget requirements. A merged capacitor switching method is employed to decrease power consumption and the capacitor array has been split up into two sub-DACs in order to reduce the area. The prototype has been implemented in a 110-nm CMOS technology. With a power supply of 1.2 V and a 100 MHz clock, simulations show an ENOB 9.87 of and a SFDR of 73.42 dB. The power consumption of the ADC is 513 uW while the Figure of Merit (FOM) results 54.8 fJ/conv-step. The final chip includes also a calibration engine to minimize the capacitor mismatch effect thus further improving the resolution.
978-3-8007-5588-2
File in questo prodotto:
File Dimensione Formato  
Tedesco Silvia - A 12-bit 100 MHz SAR ADC in 110-nm CMOS for MAPSs- PRIME 2021.pdf

accesso aperto

Descrizione: Articolo principale
Tipologia: 2. Post-print / Author's Accepted Manuscript
Licenza: PUBBLICO - Tutti i diritti riservati
Dimensione 728.77 kB
Formato Adobe PDF
728.77 kB Adobe PDF Visualizza/Apri
A_12-bit_100_MHz_SAR_ADC_in_110-nm_CMOS_for_MAPSs.pdf

non disponibili

Descrizione: Articolo principale
Tipologia: 2. Post-print / Author's Accepted Manuscript
Licenza: Non Pubblico - Accesso privato/ristretto
Dimensione 374.52 kB
Formato Adobe PDF
374.52 kB Adobe PDF   Visualizza/Apri   Richiedi una copia
Pubblicazioni consigliate

Caricamento pubblicazioni consigliate

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2929016