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EnglishMachine learning (ML) theories and tools suggest alternative forms to conceive and represent relationships among data. The same theories find their application in the Boolean domain, where logic functions can be described as inference rules. This paper introduces Inferential Logic, a novel paradigm that leverages the ML concept of statistical inference for the design of combinational logic circuits, the Inferential Logic Circuits (ILCs). This new design concept is conceived for low-power circuits that run quasi-exact computation in error-resilient applications, but it also provides an exact run-mode that can be dynamically enabled when accuracy scaling is not an option.
Inferential Logic: A Machine Learning Inspired Paradigm for Combinational Circuits / Tenace, V.; Calimera, A.. - 2018-(2019), pp. 149-154. ((Intervento presentato al convegno 26th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018 tenutosi a ita nel 2018.
| Titolo: | Inferential Logic: A Machine Learning Inspired Paradigm for Combinational Circuits |
| Autori: | |
| Data di pubblicazione: | 2019 |
| Abstract: | Machine learning (ML) theories and tools suggest alternative forms to conceive and represent rela...tionships among data. The same theories find their application in the Boolean domain, where logic functions can be described as inference rules. This paper introduces Inferential Logic, a novel paradigm that leverages the ML concept of statistical inference for the design of combinational logic circuits, the Inferential Logic Circuits (ILCs). This new design concept is conceived for low-power circuits that run quasi-exact computation in error-resilient applications, but it also provides an exact run-mode that can be dynamically enabled when accuracy scaling is not an option. |
| ISBN: | 978-1-5386-4756-1 |
| Appare nelle tipologie: | 4.1 Contributo in Atti di convegno |
File in questo prodotto:
| File | Descrizione | Tipologia | Licenza | |
|---|---|---|---|---|
| 08644808.pdf | 2a Post-print versione editoriale / Version of Record | Non Pubblico - Accesso privato/ristretto | Administrator Richiedi una copia | |
| VLSI-SOC_2018_paper_79.pdf | 2. Post-print / Author's Accepted Manuscript | PUBBLICO - Tutti i diritti riservati | Visibile a tuttiVisualizza/Apri |
http://hdl.handle.net/11583/2797443
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