Due to the complexity of digital circuits manufacturing, nowadays most semi-conductor companies outsource part of the fabrication process, reducing both the production costs and the time-to-market. However, as untrusted parties are involved in the production-chain, new security risks arise, and the threat of Hardware Trojans is a serious concern for the producers of embedded devices. In this paper, we propose an on-chip software obfuscator aiming to reduce the activation probability of malicious components through software. Using a completely transparent hardware based solution, with a limited hardware and time overhead, the sequence of instructions is modified, eventually defusing Trojan activation sequences, yet guaranteeing the original functionalities. The methodology was implemented in a modified version of the OR1200 processor core, using a set of programs from the MiBench test suit, to demonstrate the method suitability.
On the mitigation of Hardware Trojan attacks in embedded processors by exploiting a Hardware-based obfuscator / Marcelli, Andrea; Ernesto, Sanchez; Sasselli, Luca; SQUILLERO, GIOVANNI. - ELETTRONICO. - (2018). ((Intervento presentato al convegno 3rd International Verification and Security Workshop (IVSW) tenutosi a Hotel Cap Roig, Platja d’Aro, Costa Brava, Spain nel July 2-4, 2018.
Titolo: | On the mitigation of Hardware Trojan attacks in embedded processors by exploiting a Hardware-based obfuscator |
Autori: | |
Data di pubblicazione: | 2018 |
Abstract: | Due to the complexity of digital circuits manufacturing, nowadays most semi-conductor companies o...utsource part of the fabrication process, reducing both the production costs and the time-to-market. However, as untrusted parties are involved in the production-chain, new security risks arise, and the threat of Hardware Trojans is a serious concern for the producers of embedded devices. In this paper, we propose an on-chip software obfuscator aiming to reduce the activation probability of malicious components through software. Using a completely transparent hardware based solution, with a limited hardware and time overhead, the sequence of instructions is modified, eventually defusing Trojan activation sequences, yet guaranteeing the original functionalities. The methodology was implemented in a modified version of the OR1200 processor core, using a set of programs from the MiBench test suit, to demonstrate the method suitability. |
Appare nelle tipologie: | 4.1 Contributo in Atti di convegno |
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http://hdl.handle.net/11583/2713309