The growing trend toward heterogeneous platforms is crucial to meet time and power consumption constraints for high-performance computing applications. The OpenCL parallel programming language and framework enable programming CPU, GPU and recently FPGAs using the same source code. This eases software developers to implement applications on various devices supported by heterogeneous HPC platforms. This work presents two very different FPGA implementations of a database join operation, one using a direct O(n2) algorithm, and the other using a bitonic sort network to speed up the join operation. Comparison of performance and energy consumption for both FPGA and GPUs is provided which suggests a 40% performance/watt improvement by using an FPGA instead of a GPU.
Implementation of a performance optimized database join operation on FPGA-GPU platforms using OpenCL / Roozmeh, Mehdi; Lavagno, Luciano. - ELETTRONICO. - (2017), pp. 1-6. (Intervento presentato al convegno 2017 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) tenutosi a Linkoping, Sveden nel 23-25 Oct. 2017) [10.1109/NORCHIP.2017.8124981].
Implementation of a performance optimized database join operation on FPGA-GPU platforms using OpenCL
Roozmeh, Mehdi;Lavagno, Luciano
2017
Abstract
The growing trend toward heterogeneous platforms is crucial to meet time and power consumption constraints for high-performance computing applications. The OpenCL parallel programming language and framework enable programming CPU, GPU and recently FPGAs using the same source code. This eases software developers to implement applications on various devices supported by heterogeneous HPC platforms. This work presents two very different FPGA implementations of a database join operation, one using a direct O(n2) algorithm, and the other using a bitonic sort network to speed up the join operation. Comparison of performance and energy consumption for both FPGA and GPUs is provided which suggests a 40% performance/watt improvement by using an FPGA instead of a GPU.File | Dimensione | Formato | |
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https://hdl.handle.net/11583/2704818
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