In recent years Monolithic Active Pixel Sensors are becoming increasingly attractive for High Energy Physics experiments. Several R&D activities are ongoing worldwide to improve the per- formance of conventional monolithic pixels in terms of speed and radiation tolerance. These improvements come both from the optimization of the substrate material and the design of the front-end electronics. In the framework of an R&D project on CMOS monolithic sensors, a versatile readout electronics has been developed. The purpose is to have a flexible system to test different sensor geometries and substrates, allowing a detailed analog characterization and the study of effects that arise in complex mixed signal chips such as digital induced noise. The ASIC prototype, MATISSE, has been fabricated in 0.11 μm CMOS technology with a die area of 2×2 mm2 and a low voltage operation of 1.2 V. Hereafter, the front-end electronics are described and the first results from the characterization are reported.
MATISSE: A Low power front-end electronics for MAPS characterization / Olave, E. J.; Panati, S.; Cossio, F.; Rivetti, A.; Da Rocha Rolo, M.; Demaria, N.; Pancheri, L.; Mattiazzo, S.; Giubilato, P; Pantano, D.. - ELETTRONICO. - (2017). (Intervento presentato al convegno Tropical Workshop for Particle Physics tenutosi a Santa Cruz California nel 11/09/2017 - 15/09/2017).
MATISSE: A Low power front-end electronics for MAPS characterization
Olave, E. J.;Panati, S.;Cossio, F.;
2017
Abstract
In recent years Monolithic Active Pixel Sensors are becoming increasingly attractive for High Energy Physics experiments. Several R&D activities are ongoing worldwide to improve the per- formance of conventional monolithic pixels in terms of speed and radiation tolerance. These improvements come both from the optimization of the substrate material and the design of the front-end electronics. In the framework of an R&D project on CMOS monolithic sensors, a versatile readout electronics has been developed. The purpose is to have a flexible system to test different sensor geometries and substrates, allowing a detailed analog characterization and the study of effects that arise in complex mixed signal chips such as digital induced noise. The ASIC prototype, MATISSE, has been fabricated in 0.11 μm CMOS technology with a die area of 2×2 mm2 and a low voltage operation of 1.2 V. Hereafter, the front-end electronics are described and the first results from the characterization are reported.Pubblicazioni consigliate
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https://hdl.handle.net/11583/2686648
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