PORTO @ 
Archivio Istituzionale della Ricerca
IRIS è la soluzione IT che facilita la raccolta e la gestione dei dati relativi alle attività e ai prodotti della ricerca. Fornisce a ricercatori, amministratori e valutatori gli strumenti per monitorare i risultati della ricerca, aumentarne la visibilità e allocare in modo efficace le risorse disponibili.
EnglishBranch Prediction Units (BPUs) are widely used to reduce the performance penalties caused by branch instructions in pipelined processors. BPUs may be implemented in different forms: the Branch History Table (BHT) is an effective solution when the goal is predicting the result of conditional branches. In this paper we propose a method to generate test programs able to detect faults affecting the memory existing within a BHT implementing the correlated predictors approach. Our method is particularly suited to be used for the in-field test of a processor and allows detecting any stuck-at fault in the BPU memory. The method does not require the detailed knowledge of the BPU implementation, but only relies on the key parameters of its architecture. We gathered experimental results using the SimpleScalar environment.
On the In-Field Test of Branch Prediction Units using the Correlated Predictor mechanism / M.Gaudesi; S. Saleem; E. Sanchez; M. Sonza Reorda; E. Tanowe. - STAMPA. - (2014). ((Intervento presentato al convegno IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits and Systems tenutosi a Warsaw, Poland nel April 23-25.
| Titolo: | On the In-Field Test of Branch Prediction Units using the Correlated Predictor mechanism | |
| Autori: | ||
| Data di pubblicazione: | 2014 | |
| Abstract: | Branch Prediction Units (BPUs) are widely used to reduce the performance penalties caused by branch instructions in pipelined processors. BPUs may be implemented in different forms: the Branch History Table (BHT) is an effective solution when the goal is predicting the result of conditional branches. In this paper we propose a method to generate test programs able to detect faults affecting the memory existing within a BHT implementing the correlated predictors approach. Our method is particularly suited to be used for the in-field test of a processor and allows detecting any stuck-at fault in the BPU memory. The method does not require the detailed knowledge of the BPU implementation, but only relies on the key parameters of its architecture. We gathered experimental results using the SimpleScalar environment. | |
| Appare nelle tipologie: | 4.3 Poster |
File in questo prodotto:
http://hdl.handle.net/11583/2547539
Copyright © 2022