Linear macromodeling techniques are well established for compact dynamical modeling of complex signal and power distribution networks. In this work, we extend applicability of such reduced-order behavioral models to small-signal descriptions of complex circuit blocks typically found in RF or Analog and Mixed/Signal designs. In addition, we include in the models the explicit dependence on one or more design parameters, such as temperature, bias or gain, thus obtaining a multivariate small-signal behavioral macromodeling approach. The main outcome is a major reduction in the runtime required for transient system-level verification, which can be performed directly by simulating the surrogate macromodels rather than full transistor-level circuits. We demonstrate this approach through an Operarional Amplifier circuit block of a commercial 3G transceiver design.

Compact parameterized macromodels for signal and power integrity analysis of RF and mixed signal systems / GRIVET TALOCIA, Stefano; Olivadese, SALVATORE BERNARDO; Signorini, G.; Brenner, P.. - STAMPA. - (2013), pp. 40-43. ((Intervento presentato al convegno Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), 2013 IEEE tenutosi a Nara, Japan nel 12-15 Dec. 2013 [10.1109/EDAPS.2013.6724452].

Compact parameterized macromodels for signal and power integrity analysis of RF and mixed signal systems

GRIVET TALOCIA, STEFANO;OLIVADESE, SALVATORE BERNARDO;
2013

Abstract

Linear macromodeling techniques are well established for compact dynamical modeling of complex signal and power distribution networks. In this work, we extend applicability of such reduced-order behavioral models to small-signal descriptions of complex circuit blocks typically found in RF or Analog and Mixed/Signal designs. In addition, we include in the models the explicit dependence on one or more design parameters, such as temperature, bias or gain, thus obtaining a multivariate small-signal behavioral macromodeling approach. The main outcome is a major reduction in the runtime required for transient system-level verification, which can be performed directly by simulating the surrogate macromodels rather than full transistor-level circuits. We demonstrate this approach through an Operarional Amplifier circuit block of a commercial 3G transceiver design.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/2527292
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