This paper presents a novel strategy to improve the accuracy of macromodel-based approaches for fast Signal Integrity assessment for highly integrated Radio Frequency (RF) and Analog-Mixed-Signal (AMS) Systems on Chip (SoC). Specifically, we focus on small-signal representations of non-linear circuit blocks (CB) at prescribed DC operation points, which are approximated with low-order linearized macromodels to speed up the complex transient simulations required by common Signal-Integrity (SI) and Power Integrity (PI) verifications. In this paper, we propose a simple yet effective DC point correction strategy of the low-order macromodels, which enables their safe use in complete verification testbenches by ensuring exact biasing conditions for all circuit blocks. The numerical results show the effectiveness of the proposed model enhancement methodology, both in terms of accuracy and simulation time, when applied to several test cases of practical relevance for AMS and RF simulations.

DC-compliant small-signal macromodels of non-linear circuit blocks / Olivadese, SALVATORE BERNARDO; Brenner, P.; GRIVET TALOCIA, Stefano. - STAMPA. - (2013), pp. 1-4. ((Intervento presentato al convegno 17th IEEE Workshop on Signal and Power Integrity (SPI), 2013 tenutosi a Paris nel 12-15 May 2013 [10.1109/SaPIW.2013.6558330].

DC-compliant small-signal macromodels of non-linear circuit blocks

OLIVADESE, SALVATORE BERNARDO;GRIVET TALOCIA, STEFANO
2013

Abstract

This paper presents a novel strategy to improve the accuracy of macromodel-based approaches for fast Signal Integrity assessment for highly integrated Radio Frequency (RF) and Analog-Mixed-Signal (AMS) Systems on Chip (SoC). Specifically, we focus on small-signal representations of non-linear circuit blocks (CB) at prescribed DC operation points, which are approximated with low-order linearized macromodels to speed up the complex transient simulations required by common Signal-Integrity (SI) and Power Integrity (PI) verifications. In this paper, we propose a simple yet effective DC point correction strategy of the low-order macromodels, which enables their safe use in complete verification testbenches by ensuring exact biasing conditions for all circuit blocks. The numerical results show the effectiveness of the proposed model enhancement methodology, both in terms of accuracy and simulation time, when applied to several test cases of practical relevance for AMS and RF simulations.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2510281
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