DC-compliant small-signal macromodels of non-linear circuit blocks

This paper presents a novel strategy to improve the accuracy of macromodel-based approaches for fast Signal Integrity assessment for highly integrated Radio Frequency (RF) and Analog-Mixed-Signal (AMS) Systems on Chip (SoC). Specifically, we focus on small-signal representations of non-linear circuit blocks (CB) at prescribed DC operation points, which are approximated with low-order linearized macromodels to speed up the complex transient simulations required by common Signal-Integrity (SI) and Power Integrity (PI) verifications. In this paper, we propose a simple yet effective DC point correction strategy of the low-order macromodels, which enables their safe use in complete verification testbenches by ensuring exact biasing conditions for all circuit blocks. The numerical results show the effectiveness of the proposed model enhancement methodology, both in terms of accuracy and simulation time, when applied to several test cases of practical relevance for AMS and RF simulations.