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EnglishC2BIST (Circular CA BlST) is a Built-In Self Test (BIST) architecture for sequential circuits based on Cellular Automata (CA). When CA cells implement suitable rules, this structure shows good test generation capabilities, reaching high fault coverage. The main characteristic of this approach is that the same CA is used for both generation and compaction, leading to a trade-off between attained fault coverage and area overhead more favorable than other BIST approaches. On the other hand, the main problem is that the circuit, during the test phase, may enter a loop early, reducing the attained fault coverage. The paper analyzes this problem and proposes a solution based on the partial reset technique, that is able to break cycles by exploiting the circuit flip-flops synchronous reset signal with a small area overhead with respect to the basic C2BIST architecture. Experimental results allow a quantitative evaluation of the effectiveness of this approach.
An improved cellular automata-based BIST architecture for sequential circuits / F. Corno; M. Sonza Reorda; G. Squillero. - 1:(2000), pp. 76-79. ((Intervento presentato al convegno ISCAS2000: IEEE International Symposium on Circuits and Systems tenutosi a Geneva (CHE) nel 28-31 May 2000 [10.1109/ISCAS.2000.857030].
| Titolo: | An improved cellular automata-based BIST architecture for sequential circuits | |
| Autori: | ||
| Data di pubblicazione: | 2000 | |
| Abstract: | C2BIST (Circular CA BlST) is a Built-In Self Test (BIST) architecture for sequential circuits bas...ed on Cellular Automata (CA). When CA cells implement suitable rules, this structure shows good test generation capabilities, reaching high fault coverage. The main characteristic of this approach is that the same CA is used for both generation and compaction, leading to a trade-off between attained fault coverage and area overhead more favorable than other BIST approaches. On the other hand, the main problem is that the circuit, during the test phase, may enter a loop early, reducing the attained fault coverage. The paper analyzes this problem and proposes a solution based on the partial reset technique, that is able to break cycles by exploiting the circuit flip-flops synchronous reset signal with a small area overhead with respect to the basic C2BIST architecture. Experimental results allow a quantitative evaluation of the effectiveness of this approach. | |
| ISBN: | 0780354826 | |
| Appare nelle tipologie: | 4.1 Contributo in Atti di convegno |
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| File | Descrizione | Tipologia | Licenza | |
|---|---|---|---|---|
| 1661414.pdf | 2. Post-print / Author's Accepted Manuscript | Non Pubblico - Accesso privato/ristretto | Administrator Richiedi una copia |
http://hdl.handle.net/11583/1661414
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