Most Systems-on-a-Chips include a custom microprocessor core, and time and resource constraints make the design of such devices a challenging task. This paper presents a simulation-based methodology for the automatic completion and refinement of verification test sets. The approach extends the μGP, an evolutionary test program generator, with the possibility to enhance existing test sets. Already devised test programs are not merely included in the new set, but assimilated and used as a starting point for a new test-program cultivation task. Reusing existing material cuts down the time required to generate a verification test set during the microprocessor design. Experimental results are reported on a small pipelined microprocessor, and show the effectiveness of the approach. Additionally, the use of the proposed methodology enabled to experimentally analyze the relationship of the different code coverage metrics used in the test program generation.

Efficient Techniques for Automatic Verification-Oriented Test Set Optimization / SANCHEZ SANCHEZ, EDGAR ERNESTO; SONZA REORDA, Matteo; Squillero, Giovanni. - In: INTERNATIONAL JOURNAL OF PARALLEL PROGRAMMING. - ISSN 0885-7458. - 34:(2006), pp. 93-109. [10.1007/s10766-005-0005-7]

Efficient Techniques for Automatic Verification-Oriented Test Set Optimization

SANCHEZ SANCHEZ, EDGAR ERNESTO;SONZA REORDA, Matteo;SQUILLERO, Giovanni
2006

Abstract

Most Systems-on-a-Chips include a custom microprocessor core, and time and resource constraints make the design of such devices a challenging task. This paper presents a simulation-based methodology for the automatic completion and refinement of verification test sets. The approach extends the μGP, an evolutionary test program generator, with the possibility to enhance existing test sets. Already devised test programs are not merely included in the new set, but assimilated and used as a starting point for a new test-program cultivation task. Reusing existing material cuts down the time required to generate a verification test set during the microprocessor design. Experimental results are reported on a small pipelined microprocessor, and show the effectiveness of the approach. Additionally, the use of the proposed methodology enabled to experimentally analyze the relationship of the different code coverage metrics used in the test program generation.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/1501722
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