Archivio Istituzionale della RicercaRIZZO, ROBERTO GIORGIO
RIZZO, ROBERTO GIORGIO
Dipartimento di Automatica e Informatica
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Risultati 1 - 16 di 16 (tempo di esecuzione: 0.021 secondi).
On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets
2022 Mocerino, L; Rizzo, Rg; Peluso, V; Calimera, A; Macii, E
AdapTTA: Adaptive Test-Time Augmentation for Reliable Embedded ConvNets
2021 Mocerino, Luca; Rizzo, Roberto G.; Peluso, Valentino; Calimera, Andrea; Macii, Enrico
TVFS: Topology Voltage Frequency Scaling for Reliable Embedded ConvNets
2021 Rizzo, Roberto Giorgio; Peluso, Valentino; Calimera, Andrea
Efficacy of topology scaling for temperature and latency constrained embedded convnets
2020 Peluso, V.; Rizzo, R. G.; Calimera, A.
Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools
2019 Rizzo, ROBERTO GIORGIO
Implementing adaptive voltage over-scaling: Algorithmic noise tolerance vs. approximate error detection
2019 Rizzo, R. G.; Calimera, A.
Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets
2019 Peluso, V.; Rizzo, R. G.; Cipolletta, A.; Calimera, A.
On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling
2019 Rizzo, Roberto G.; Peluso, Valentino; Calimera, Andrea; Zhou, Jun
Performance Profiling of Embedded ConvNets under Thermal-Aware DVFS
2019 Peluso, Valentino; Rizzo, Roberto Giorgio; Calimera, Andrea
SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars
2019 Tenace, V.; Rizzo, R. G.; Bhattacharjee, D.; Chattopadhyay, A.; Calimera, A.
Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling
2018 Rizzo, ROBERTO GIORGIO; Calimera, Andrea; Zhou, Jun
Multiplication by Inference using Classification Trees: A Case-Study Analysis
2018 Rizzo, Roberto Giorgio; Tenace, Valerio; Calimera, Andrea
Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping
2017 Peluso, Valentino; Rizzo, ROBERTO GIORGIO; Calimera, Andrea; Macii, Enrico; Alioto, Massimo
Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS
2017 Rizzo, Roberto G.; Peluso, Valentino; Calimera, Andrea; Zhou, Jun; Liu, Xin
Tunable Error Detection-Correction for Efficient Adaptive Voltage Over-Scaling
2017 Rizzo, ROBERTO GIORGIO; Calimera, Andrea
Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions.
2015 Rizzo, ROBERTO GIORGIO; Miryala, Sandeep; Calimera, Andrea; Macii, Enrico; Poncino, Massimo
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| On the Efficiency of AdapTTA: An Adaptive Test-Time Augmentation Strategy for Reliable Embedded ConvNets / Mocerino, L; Rizzo, Rg; Peluso, V; Calimera, A; Macii, E (IFIP ADVANCES IN INFORMATION AND COMMUNICATION TECHNOLOGY). - In: VLSI-SoC: Technology Advancement on SoC Design / Grimblatt V., Hong Chang C., Reis R., Chattopadhyay A., Calimera A.. - Cham, Switzerland : SPRINGER INTERNATIONAL PUBLISHING AG, 2022. - ISBN 978-3-031-16817-8. - pp. 1-23 [10.1007/978-3-031-16818-5_1] | 1-gen-2022 | Mocerino, LRizzo, RGPeluso, VCalimera, AMacii, E | AdapTTA___Book_Chapter_for_paper_53_revised_1.pdf |
| AdapTTA: Adaptive Test-Time Augmentation for Reliable Embedded ConvNets / Mocerino, Luca; Rizzo, Roberto G.; Peluso, Valentino; Calimera, Andrea; Macii, Enrico. - (2021), pp. 1-6. (Intervento presentato al convegno International Conference on Very Large Scale Integration (VLSI-SoC) nel 4-7 Oct. 2021) [10.1109/VLSI-SoC53125.2021.9606980]. | 1-gen-2021 | Mocerino, LucaRizzo, Roberto G.Peluso, ValentinoCalimera, AndreaMacii, Enrico | Adaptive_Test_time_Augmentation____VLSI_SoC2021.pdf; AdapTTA_Adaptive_Test-Time_Augmentation_for_Reliable_Embedded_ConvNets.pdf |
| TVFS: Topology Voltage Frequency Scaling for Reliable Embedded ConvNets / Rizzo, Roberto Giorgio; Peluso, Valentino; Calimera, Andrea. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS. - ISSN 1549-7747. - 68:2(2021), pp. 672-676. [10.1109/TCSII.2020.3017538] | 1-gen-2021 | Rizzo, Roberto GiorgioPeluso, ValentinoCalimera, Andrea | FINAL VERSION.pdf; 09170585.pdf |
| Efficacy of topology scaling for temperature and latency constrained embedded convnets / Peluso, V.; Rizzo, R. G.; Calimera, A.. - In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS. - ISSN 2079-9268. - 10:1(2020), p. 10. [10.3390/jlpea10010010] | 1-gen-2020 | Peluso V.Rizzo R. G.Calimera A. | jlpea-10-00010-v2 (1).pdf |
| Energy-Accuracy Scaling in Digital ICs: Static and Adaptive Design Methods and Tools / Rizzo, ROBERTO GIORGIO. - (2019 Jul 16), pp. 1-155. | 16-lug-2019 | RIZZO, ROBERTO GIORGIO | RobertoGiorgio_Rizzo_PhD_Thesis_versione_ufficiale-A.pdf; Abstract-A.pdf; RobertoGiorgio_Rizzo_PhD_Thesis_Corretto.pdf |
| Implementing adaptive voltage over-scaling: Algorithmic noise tolerance vs. approximate error detection / Rizzo, R. G.; Calimera, A.. - In: JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS. - ISSN 2079-9268. - 9:2(2019). [10.3390/jlpea9020017] | 1-gen-2019 | Rizzo R. G.Calimera A. | jlpea-09-00017-v3.pdf |
| Inference on the Edge: Performance Analysis of an Image Classification Task Using Off-The-Shelf CPUs and Open-Source ConvNets / Peluso, V.; Rizzo, R. G.; Cipolletta, A.; Calimera, A.. - (2019), pp. 454-459. (Intervento presentato al convegno 6th International Conference on Social Networks Analysis, Management and Security, SNAMS 2019 tenutosi a esp nel 2019) [10.1109/SNAMS.2019.8931889]. | 1-gen-2019 | Peluso V.Rizzo R. G.Cipolletta A.Calimera A. | SNAMS19.pdf; 08931889_snam.pdf |
| On the Efficiency of Early Bird Sampling (EBS) an Error Detection-Correction Scheme for Data-Driven Voltage Over-Scaling / Rizzo, Roberto G.; Peluso, Valentino; Calimera, Andrea; Zhou, Jun. - 500:(2019), pp. 153-177. (Intervento presentato al convegno 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017,) [10.1007/978-3-030-15663-3_8]. | 1-gen-2019 | Rizzo, Roberto G.Peluso, ValentinoCalimera, Andrea + | - |
| Performance Profiling of Embedded ConvNets under Thermal-Aware DVFS / Peluso, Valentino; Rizzo, Roberto Giorgio; Calimera, Andrea. - In: ELECTRONICS. - ISSN 2079-9292. - 8:12(2019), p. 1423. [10.3390/electronics8121423] | 1-gen-2019 | Peluso, ValentinoRizzo, Roberto GiorgioCalimera, Andrea | electronics-08-01423.pdf |
| SAID: A Supergate-Aided Logic Synthesis Flow for Memristive Crossbars / Tenace, V.; Rizzo, R. G.; Bhattacharjee, D.; Chattopadhyay, A.; Calimera, A.. - (2019), pp. 372-377. (Intervento presentato al convegno 22nd Design, Automation and Test in Europe Conference and Exhibition, DATE 2019 tenutosi a Firenze Fiera, ita nel 2019) [10.23919/DATE.2019.8714939]. | 1-gen-2019 | Rizzo R. G.Calimera A. + | - |
| Approximate Error Detection-Correction for efficient Adaptive Voltage Over-Scaling / Rizzo, ROBERTO GIORGIO; Calimera, Andrea; Zhou, Jun. - In: INTEGRATION. - ISSN 0167-9260. - 63:(2018), pp. 220-231. [10.1016/j.vlsi.2018.04.008] | 1-gen-2018 | RIZZO, ROBERTO GIORGIOCalimera, Andrea + | 1-s2.0-S0167926017307915-main.pdf |
| Multiplication by Inference using Classification Trees: A Case-Study Analysis / Rizzo, Roberto Giorgio; Tenace, Valerio; Calimera, Andrea. - (2018), pp. 1-5. (Intervento presentato al convegno IEEE International Symposium on Circuits and Systems (ISCAS)) [10.1109/ISCAS.2018.8351206]. | 1-gen-2018 | Rizzo, Roberto GiorgioTenace, ValerioCalimera, Andrea | - |
| Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping / Peluso, Valentino; Rizzo, ROBERTO GIORGIO; Calimera, Andrea; Macii, Enrico; Alioto, Massimo - In: VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and ReliabilitySTAMPA. - [s.l] : Springer, 2017. - ISBN 978-3-319-67103-1. - pp. 152-172 [10.1007/978-3-319-67104-8_8] | 1-gen-2017 | PELUSO, VALENTINORIZZO, ROBERTO GIORGIOCALIMERA, ANDREAMACII, EnricoALIOTO, MASSIMO | main.pdf |
| Early bird sampling: A short-paths free error detection-correction strategy for data-driven VOS / Rizzo, Roberto G.; Peluso, Valentino; Calimera, Andrea; Zhou, Jun; Liu, Xin. - (2017), pp. 1-6. (Intervento presentato al convegno IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) tenutosi a Abu Dhabi nel October 2017) [10.1109/VLSI-SoC.2017.8203472]. | 1-gen-2017 | Rizzo, Roberto G.Peluso, ValentinoCalimera, Andrea + | - |
| Tunable Error Detection-Correction for Efficient Adaptive Voltage Over-Scaling / Rizzo, ROBERTO GIORGIO; Calimera, Andrea. - ELETTRONICO. - (2017), pp. 13-16. (Intervento presentato al convegno NGCAS'17: New Generation of Circuits and Systems tenutosi a Genova nel September 2017) [10.1109/NGCAS.2017.75]. | 1-gen-2017 | RIZZO, ROBERTO GIORGIOCALIMERA, ANDREA | - |
| Design and Characterization of Analog-to-Digital Converters using Graphene P-N Junctions / Rizzo, ROBERTO GIORGIO; Miryala, Sandeep; Calimera, Andrea; Macii, Enrico; Poncino, Massimo. - ELETTRONICO. - (2015), pp. 253-258. (Intervento presentato al convegno GLSVLSI '15 tenutosi a Pittsburgh, PA (USA) nel 20-22 May) [10.1145/2742060.2742099]. | 1-gen-2015 | RIZZO, ROBERTO GIORGIOMIRYALA, SANDEEPCALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO | - |