MACCHIARULO, Luca

MACCHIARULO, Luca  

Dipartimento di Elettronica (attivo dal 01/01/1900 al 31/12/2011)  

003794  

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A case study for NoC based homogeneous MPSoC architectures / Tota, Sergio Vincenzo; Casu, MARIO ROBERTO; RUO ROCH, Massimo; Macchiarulo, Luca; Zamboni, Maurizio. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - STAMPA. - 17:3(2009), pp. 384-388. [10.1109/TVLSI.2008.2011239] 1-gen-2009 TOTA, Sergio VincenzoCASU, MARIO ROBERTORUO ROCH, MassimoMACCHIARULO, LucaZAMBONI, Maurizio published_paper.pdf
Adaptive Latency Insensitive Protocols andElastic Circuits with Early Evaluation: A Comparative Analysis / Casu, MARIO ROBERTO; Macchiarulo, Luca. - In: ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE. - ISSN 1571-0661. - 245:(2009), pp. 35-50. [10.1016/j.entcs.2009.07.027] 1-gen-2009 CASU, MARIO ROBERTOMACCHIARULO, Luca casu_macchiarulo_cameraready.pdf
Adaptive Latency Insensitive Protocols / Casu, MARIO ROBERTO; Macchiarulo, Luca. - In: IEEE DESIGN & TEST OF COMPUTERS. - ISSN 0740-7475. - STAMPA. - 24:(2007), pp. 442-452. [10.1109/MDT.2007.152] 1-gen-2007 CASU, MARIO ROBERTOMACCHIARULO, Luca dtc07_paper.pdf
Floorplanning with wire pipelining in adaptive communication channels / Casu, MARIO ROBERTO; Macchiarulo, Luca. - In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. - ISSN 0278-0070. - STAMPA. - 12:(2006), pp. 2996-3004. [10.1109/TCAD.2006.882590] 1-gen-2006 CASU, MARIO ROBERTOMACCHIARULO, Luca tcad06_paper.pdf
Throughput-driven floorplanning with wire pipelining / Casu, MARIO ROBERTO; Macchiarulo, Luca. - In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. - ISSN 0278-0070. - STAMPA. - 24:(2005), pp. 663-675. [10.1109/TCAD.2005.846371] 1-gen-2005 CASU, MARIO ROBERTOMACCHIARULO, Luca tcad05_paper.pdf