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A Low-cost Emulation System for Fast Co-verification and Debug
2011 LAGOS BENITES, JORGE LUIS; Grosso, Michelangelo; Sterpone, Luca; SONZA REORDA, Matteo; Audisio, G.; Pipponzi, M.; Sabatini, M.
An FPGA-emulation-based platform for characterization of digital baseband communication systems
2011 LAGOS BENITES, JORGE LUIS; Grosso, Michelangelo; SONZA REORDA, Matteo; Audisio, G.; Pipponzi, M.; Sabatini, M.; Avantaggiati, V. A.
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| A Low-cost Emulation System for Fast Co-verification and Debug / LAGOS BENITES, JORGE LUIS; Grosso, Michelangelo; Sterpone, Luca; SONZA REORDA, Matteo; Audisio, G.; Pipponzi, M.; Sabatini, M.. - (2011), pp. 212-212. ( IEEE European Test Symposium Trondheim (N) May 23-27, 2011) [10.1109/ETS.2011.32]. | 1-gen-2011 | LAGOS BENITES, JORGE LUISGROSSO, MICHELANGELOSTERPONE, LucaSONZA REORDA, Matteo + | 2413925-mod.pdf |
| An FPGA-emulation-based platform for characterization of digital baseband communication systems / LAGOS BENITES, JORGE LUIS; Grosso, Michelangelo; SONZA REORDA, Matteo; Audisio, G.; Pipponzi, M.; Sabatini, M.; Avantaggiati, V. A.. - (2011), pp. 391-398. ( International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems Vancouver, B.C. (CA) Oct. 3-5, 2011) [10.1109/DFT.2011.1]. | 1-gen-2011 | LAGOS BENITES, JORGE LUISGROSSO, MICHELANGELOSONZA REORDA, Matteo + | 2443375-mod.pdf |