Archivio Istituzionale della RicercaSfoglia per Autore
Dynamic Indexing: Concurrent Leakage and Aging Optimizationfor Caches
2010 Calimera, Andrea; M., Loghi; Macii, Enrico; Poncino, Massimo
NBTI-Aware Clustered Power Gating
2010 Calimera, Andrea; Macii, Enrico; Poncino, Massimo
THERMINATOR: Modeling, control and management of thermal effects in electronic circuits of the future
2010 Calimera, Andrea; Macii, Alberto; Macii, Enrico; S., Rinaudo; Poncino, Massimo
Minimizing temperature sensitivity of dual-Vt CMOS circuits using Simulated-Annealing on ISING-like models
2010 M., Caldera; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Temperature-Insensitive Dual-Vth Synthesis for Nanometer CMOS Technologies Under Inverse Temperature Dependence
2010 Calimera, Andrea; R., Bahar; Macii, Enrico; Poncino, Massimo
Dual-Vt Assignment Policies in ITD-Aware Synthesis
2010 Calimera, Andrea; Bahar, R. I.; Macii, Enrico; Poncino, Massimo
Post-placement temperature reduction techniques
2010 Liu, Wei; Nannarelli, A.; Calimera, Andrea; Macii, Enrico; Poncino, Massimo
On-chip Thermal Modeling Based on SPICE Simulation
2010 Wei, L.; Calimera, Andrea; Nannarelli, A.; Macii, Enrico; Poncino, Massimo
Power-Gating: More Than Leakage Savings
2010 Calimera, Andrea; Macii, Enrico; Poncino, Massimo
Sub-row sleep transistor insertion for concurrent clock-gating and power-gating
2011 Lingasubramanian, Karthikeyan; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
A New Built-In Current Sensor Scheme to Detect Dynamic Faults in Nano-Scale SRAMs
2011 F., Lavratti; Calimera, Andrea; L., Bolzani; F., Vargas; Macii, Enrico
Modeling of thermally induced skew variations in clock distribution network
2011 Sassone, Alessandro; Liu, Wei; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
NBTI-Aware Data Allocation Strategies for Scratchpad Memory Based Embedded Systems
2011 C., Ferri; D., Papagiannopoulou; R., Bahar; Calimera, Andrea
An on-chip all-digital PV-monitoring architecture for digital IPs
2011 H., Karimiyan; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Partitioned cache architectures for reduced NBTI-induced aging
2011 Calimera, Andrea; M., Loghi; Macii, Enrico; Poncino, Massimo
Buffering of frequent accesses for reduced cache aging
2011 Calimera, Andrea; M., Loghi; Macii, Enrico; Poncino, Massimo
Power Efficient Variability Compensation Through Clustered Tunable Power-Gating
2011 L. d., Lima; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Moving to Green ICT: From stand-alone power-aware IC design to an integrated approach to energy efficient design for heterogeneous electronic systems
2011 S., Rinaudo; G., Gangemi; Calimera, Andrea; Macii, Alberto; Poncino, Massimo
Power and Aging Characterization of Digital FIR Filters Architectures
2012 Calimera, Andrea; W., Liu; Macii, Enrico; A., Nannarelli; Poncino, Massimo
Energy-optimal caches with guaranteed lifetime
2012 Loghi, M.; Mahmood, Haroon; Calimera, Andrea; Poncino, Massimo; Macii, Enrico
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Dynamic Indexing: Concurrent Leakage and Aging Optimizationfor Caches / Calimera, Andrea; M., Loghi; Macii, Enrico; Poncino, Massimo. - (2010), pp. 343-348. (Intervento presentato al convegno ACM/IEEE ISLPED-10: ACM/IEEE International Symposium on Low Power Electronics and Design nel Agosto) [10.1145/1840845.1840916]. | 1-gen-2010 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO + | - |
| NBTI-Aware Clustered Power Gating / Calimera, Andrea; Macii, Enrico; Poncino, Massimo. - In: ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS. - ISSN 1084-4309. - (2010), pp. 3-1-3-25. [10.1145/1870109.1870112] | 1-gen-2010 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO | - |
| THERMINATOR: Modeling, control and management of thermal effects in electronic circuits of the future / Calimera, Andrea; Macii, Alberto; Macii, Enrico; S., Rinaudo; Poncino, Massimo. - (2010), pp. 171-176. (Intervento presentato al convegno THERMINIC-10: International Workshop on Thermal Investigations of ICs and Systems tenutosi a Barcelona nel October). | 1-gen-2010 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Minimizing temperature sensitivity of dual-Vt CMOS circuits using Simulated-Annealing on ISING-like models / M., Caldera; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - (2010), pp. 189-194. (Intervento presentato al convegno THERMINIC-2010: IEEE International Workshop on Thermal Investigations of ICs and Systems tenutosi a Barcelona (ESP) nel October). | 1-gen-2010 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Temperature-Insensitive Dual-Vth Synthesis for Nanometer CMOS Technologies Under Inverse Temperature Dependence / Calimera, Andrea; R., Bahar; Macii, Enrico; Poncino, Massimo. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - 18:11(2010), pp. 1608-1620. [10.1109/TVLSI.2009.2025884] | 1-gen-2010 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO + | - |
| Dual-Vt Assignment Policies in ITD-Aware Synthesis / Calimera, Andrea; Bahar, R. I.; Macii, Enrico; Poncino, Massimo. - In: MICROELECTRONICS JOURNAL. - ISSN 0959-8324. - 41:(2010), pp. 547-553. [10.1016/j.mejo.2009.12.004] | 1-gen-2010 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO + | - |
| Post-placement temperature reduction techniques / Liu, Wei; Nannarelli, A.; Calimera, Andrea; Macii, Enrico; Poncino, Massimo. - (2010), pp. 634-637. (Intervento presentato al convegno DATE'10: IEEE Designa, Automation and Test in Europe tenutosi a Dresden nel March). | 1-gen-2010 | LIU, WEICALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO + | - |
| On-chip Thermal Modeling Based on SPICE Simulation / Wei, L.; Calimera, Andrea; Nannarelli, A.; Macii, Enrico; Poncino, Massimo. - ELETTRONICO. - 5953:(2010), pp. 66-75. (Intervento presentato al convegno 19th International Workshop on Power and Timing Modeling, Optimization and Simulation, PATMOS 2009 tenutosi a Delft (NL) nel September 9-11, 2009) [10.1007/978-3-642-11802-9_11]. | 1-gen-2010 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO + | - |
| Power-Gating: More Than Leakage Savings / Calimera, Andrea; Macii, Enrico; Poncino, Massimo. - (2010), pp. 18-21. (Intervento presentato al convegno IEEE PRIME-10: IEEE Conference on Ph.D. Research in Microelectronics and Electronics nel Jul.). | 1-gen-2010 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO | 10119.pdf |
| Sub-row sleep transistor insertion for concurrent clock-gating and power-gating / Lingasubramanian, Karthikeyan; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - 6951:(2011), pp. 214-225. (Intervento presentato al convegno 21st International Workshop on Power and Timing Modeling, Optimization, and Simulation, PATMOS 2011 tenutosi a Madrid (SP) nel September 26-29, 2011) [10.1007/978-3-642-24154-3_22]. | 1-gen-2011 | LINGASUBRAMANIAN, KARTHIKEYANCALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO | - |
| A New Built-In Current Sensor Scheme to Detect Dynamic Faults in Nano-Scale SRAMs / F., Lavratti; Calimera, Andrea; L., Bolzani; F., Vargas; Macii, Enrico. - (2011), pp. 1-6. (Intervento presentato al convegno LATW: IEEE Latin American Test Workshop nel 2011) [10.1109/LATW.2011.5985934]. | 1-gen-2011 | CALIMERA, ANDREAMACII, Enrico + | 2471382-mod.pdf |
| Modeling of thermally induced skew variations in clock distribution network / Sassone, Alessandro; Liu, Wei; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - (2011), pp. 1-6. (Intervento presentato al convegno 17th International Workshop on Thermal Investigations of ICs and Systems, THERMINIC 2011 tenutosi a Paris (FRA) nel 27-29 Sept. 2011). | 1-gen-2011 | SASSONE, ALESSANDROLIU, WEICALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO | therminic11-57.pdf |
| NBTI-Aware Data Allocation Strategies for Scratchpad Memory Based Embedded Systems / C., Ferri; D., Papagiannopoulou; R., Bahar; Calimera, Andrea. - (2011), pp. 1-6. (Intervento presentato al convegno LATW: IEEE Latin American Test Workshop nel 2011). | 1-gen-2011 | CALIMERA, ANDREA + | paper.pdf |
| An on-chip all-digital PV-monitoring architecture for digital IPs / H., Karimiyan; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - 6951:(2011), pp. 162-172. (Intervento presentato al convegno 21st International Workshop on Power and Timing Modeling, Optimization, and Simulation, PATMOS 2011 tenutosi a Madrid (SP) nel September 26-29, 2011) [10.1007/978-3-642-24154-3_17]. | 1-gen-2011 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Partitioned cache architectures for reduced NBTI-induced aging / Calimera, Andrea; M., Loghi; Macii, Enrico; Poncino, Massimo. - (2011), pp. 1-6. (Intervento presentato al convegno DATE 2011 nel 2011). | 1-gen-2011 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO + | MPNBTI.pdf; 05763152.pdf |
| Buffering of frequent accesses for reduced cache aging / Calimera, Andrea; M., Loghi; Macii, Enrico; Poncino, Massimo. - (2011), pp. 295-300. (Intervento presentato al convegno GLS-VLSI: ACM/IEEE Great Lakes Symposium on VLSI nel 2011) [10.1145/1973009.1973068]. | 1-gen-2011 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO + | MPNBTI.full.pdf |
| Power Efficient Variability Compensation Through Clustered Tunable Power-Gating / L. d., Lima; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - In: IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS. - ISSN 2156-3357. - 1:3(2011), pp. 242-253. [10.1109/JETCAS.2011.2163689] | 1-gen-2011 | CALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO + | - |
| Moving to Green ICT: From stand-alone power-aware IC design to an integrated approach to energy efficient design for heterogeneous electronic systems / S., Rinaudo; G., Gangemi; Calimera, Andrea; Macii, Alberto; Poncino, Massimo. - (2011), pp. 1127-1128. (Intervento presentato al convegno 14th Design, Automation and Test in Europe Conference and Exhibition, DATE 2011 tenutosi a Grenoble (FRA) nel 14-18 March 2011). | 1-gen-2011 | CALIMERA, ANDREAMACII, AlbertoPONCINO, MASSIMO + | - |
| Power and Aging Characterization of Digital FIR Filters Architectures / Calimera, Andrea; W., Liu; Macii, Enrico; A., Nannarelli; Poncino, Massimo. - (2012). (Intervento presentato al convegno 1st MEDIAN Workshop). | 1-gen-2012 | CALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO + | - |
| Energy-optimal caches with guaranteed lifetime / Loghi, M.; Mahmood, Haroon; Calimera, Andrea; Poncino, Massimo; Macii, Enrico. - (2012), pp. 141-146. (Intervento presentato al convegno ACM/IEEE International Symposium on Low Power Electronics and Design tenutosi a Redondo Beach, California nel August, 2012) [10.1145/2333660.2333696]. | 1-gen-2012 | MAHMOOD, HAROONCALIMERA, ANDREAPONCINO, MASSIMOMACII, Enrico + | 2333660.2333696.pdf |
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