Sfoglia per Rivista IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES
A Methodology for the Automatic Selection of Instruction Op-Codes of Low-Power Core Processors
1999 Benini, L.; DE MICHELI, G.; Macii, Alberto; Macii, E.; Poncino, Massimo
Application of symbolic FSM Markovian analysis to protocol verification
1999 Baldi, Mario; Macii, Alberto; Macii, Enrico; Poncino, Massimo
Asynchronous on-chip networks
2005 M., Amde; T., Felicijan; A., Efthymiou; D., Edwards; Lavagno, Luciano
Automatic Selection of Instruction Op-Codes of Low-Power Core Processors
1999 L., Benini; DE MICHELI, G; Macii, Alberto; Macii, Enrico; Poncino, M.
A Code Compression Architecture for Cache Energy Minimization in Embedded Systems
2002 Benini, L.; Macii, Alberto; Nannarelli, A.
Division Unit with Newton-Raphson Approximation and Digit-by-Digit Refinement of the Quotient
1994 Montuschi, Paolo; Ciminiera, Luigi; Giustina, A.
Enhancing Behavioral-Level Design Flows with Statistical Power Estimation Capabilities
2005 A. R. T. S., B.; Macii, Enrico; Benini, L; VAN DER ENG, N; Heijligers, M; Kenter, A; Munk, H; Theeuwen, F.
Estimating Power Consumption of CMOS Circuits Modeled as Symbolic Neural Networks
1996 Macii, Enrico; Poncino, Massimo
Exploiting Timed Transition Relations in Sequential Cycle-Based Simulation of Embedded Systems
2000 Cabodi, Gianpiero; Camurati, Paolo Enrico; Passerone, Claudio; Quer, Stefano
Implicit Manipulation of Equivalence Classes for Large Finite State Machines
1998 Cabodi, Gianpiero; Camurati, Paolo Enrico; Quer, Stefano
Low Power SoC Design
2002 AL HASHIMI, B.; Macii, Enrico; Roy, K.
Low-Power System-on-Chip Architecture for Wireless LANs
2004 Bisdounis, L.; Dre, C.; Blionas, S.; Metafas, D.; Tatsaki, A.; Ieromnimon, F.; Macii, Enrico; Rouzet, P.; Zafalon, R.; Benini, L.
Minimisation of control store width in digital systems
1994 Masera, Guido; G., Piccinini; Zamboni, Maurizio
Minimization of the control store width in digital systems
1994 Masera, Guido; G., Piccinini; Zamboni, Maurizio
Power Optimization of FPGA-Based Designs without Re-Wiring
2000 Kumthekar, B.; Benini, L.; Macii, Enrico; Somenzi, F.
Predicting the Complexity of Large Combinational Circuits ThroughSymbolic Spectral Analysis of their Functional Specifications
1997 Macii, Enrico; Poncino, M.
Quotient Prediction without Prescaling
1995 Montuschi, Paolo; Ciminiera, Luigi
RTL power estimation in an HDL-based design flow
2005 Bruno, M; Macii, Alberto; Poncino, Massimo
Scalable Techniques for System-level Co-simulation and Co-estimation
2003 Lajolo, M.; Passerone, Claudio; Lavagno, Luciano
Spatial Bounding of Complex CSG Objects
1995 Sanna, Andrea; Montuschi, Paolo
Citazione | Data di pubblicazione | Autori | File |
---|---|---|---|
A Methodology for the Automatic Selection of Instruction Op-Codes of Low-Power Core Processors / Benini, L.; DE MICHELI, G.; Macii, Alberto; Macii, E.; Poncino, Massimo. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 146:(1999). | 1-gen-1999 | MACII, AlbertoMACII E.PONCINO, MASSIMO + | - |
Application of symbolic FSM Markovian analysis to protocol verification / Baldi, Mario; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 146:5(1999), pp. 221-226. [10.1049/ip-cdt:19990645] | 1-gen-1999 | BALDI, MARIOMACII, AlbertoMACII, EnricoPONCINO, MASSIMO | - |
Asynchronous on-chip networks / M., Amde; T., Felicijan; A., Efthymiou; D., Edwards; Lavagno, Luciano. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 152(2):(2005), p. 273-283. | 1-gen-2005 | LAVAGNO, Luciano + | - |
Automatic Selection of Instruction Op-Codes of Low-Power Core Processors / L., Benini; DE MICHELI, G; Macii, Alberto; Macii, Enrico; Poncino, M.. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 146:(1999), pp. 173-178. [10.1049/ip-cdt:19990419] | 1-gen-1999 | MACII, AlbertoMACII, EnricoPONCINO M. + | - |
A Code Compression Architecture for Cache Energy Minimization in Embedded Systems / Benini, L.; Macii, Alberto; Nannarelli, A.. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 149-4:(2002), pp. 157-163. [10.1049/ip-cdt:20020467] | 1-gen-2002 | MACII, Alberto + | - |
Division Unit with Newton-Raphson Approximation and Digit-by-Digit Refinement of the Quotient / Montuschi, Paolo; Ciminiera, Luigi; Giustina, A.. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - STAMPA. - 141:6(1994), pp. 317-324. [10.1049/ip-cdt:19941386] | 1-gen-1994 | MONTUSCHI, PAOLOCIMINIERA, Luigi + | - |
Enhancing Behavioral-Level Design Flows with Statistical Power Estimation Capabilities / A. R. T. S., B.; Macii, Enrico; Benini, L; VAN DER ENG, N; Heijligers, M; Kenter, A; Munk, H; Theeuwen, F.. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 152:6(2005), pp. 731-737. [10.1049/ip-cdt:20045187] | 1-gen-2005 | MACII, Enrico + | - |
Estimating Power Consumption of CMOS Circuits Modeled as Symbolic Neural Networks / Macii, Enrico; Poncino, Massimo. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 143:(1996), pp. 331-336. [10.1049/ip-cdt:19960633] | 1-gen-1996 | MACII, EnricoPONCINO, MASSIMO | - |
Exploiting Timed Transition Relations in Sequential Cycle-Based Simulation of Embedded Systems / Cabodi, Gianpiero; Camurati, Paolo Enrico; Passerone, Claudio; Quer, Stefano. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 147:(2000), pp. 305-312. [10.1049/ip-cdt:20000684] | 1-gen-2000 | CABODI, GianpieroCAMURATI, Paolo EnricoPASSERONE, ClaudioQUER, Stefano | - |
Implicit Manipulation of Equivalence Classes for Large Finite State Machines / Cabodi, Gianpiero; Camurati, Paolo Enrico; Quer, Stefano. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 145:(1998), pp. 395-402. | 1-gen-1998 | CABODI, GianpieroCAMURATI, Paolo EnricoQUER, Stefano | - |
Low Power SoC Design / AL HASHIMI, B.; Macii, Enrico; Roy, K.. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 149:(2002), pp. 135-136. | 1-gen-2002 | MACII, Enrico + | - |
Low-Power System-on-Chip Architecture for Wireless LANs / Bisdounis, L.; Dre, C.; Blionas, S.; Metafas, D.; Tatsaki, A.; Ieromnimon, F.; Macii, Enrico; Rouzet, P.; Zafalon, R.; Benini, L.. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 151:(2004), pp. 2-15. [10.1049/ip-cdt:20030978] | 1-gen-2004 | MACII, Enrico + | - |
Minimisation of control store width in digital systems / Masera, Guido; G., Piccinini; Zamboni, Maurizio. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - (1994). | 1-gen-1994 | MASERA, GuidoZAMBONI, Maurizio + | - |
Minimization of the control store width in digital systems / Masera, Guido; G., Piccinini; Zamboni, Maurizio. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 141:(1994). | 1-gen-1994 | MASERA, GuidoZAMBONI, Maurizio + | - |
Power Optimization of FPGA-Based Designs without Re-Wiring / Kumthekar, B.; Benini, L.; Macii, Enrico; Somenzi, F.. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 147:(2000), pp. 167-174. [10.1049/ip-cdt:20000497] | 1-gen-2000 | MACII, Enrico + | - |
Predicting the Complexity of Large Combinational Circuits ThroughSymbolic Spectral Analysis of their Functional Specifications / Macii, Enrico; Poncino, M.. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 144:(1997), pp. 343-347. [10.1049/ip-cdt:19971366] | 1-gen-1997 | MACII, EnricoPONCINO M. | - |
Quotient Prediction without Prescaling / Montuschi, Paolo; Ciminiera, Luigi. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - STAMPA. - 142:1(1995), pp. 15-22. [10.1049/ip-cdt:19951620] | 1-gen-1995 | MONTUSCHI, PAOLOCIMINIERA, Luigi | - |
RTL power estimation in an HDL-based design flow / Bruno, M; Macii, Alberto; Poncino, Massimo. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 152:(2005), pp. 723-730. [10.1049/IP-CDT:20045181] | 1-gen-2005 | MACII, AlbertoPONCINO, MASSIMO + | - |
Scalable Techniques for System-level Co-simulation and Co-estimation / Lajolo, M.; Passerone, Claudio; Lavagno, Luciano. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - 150:(2003), pp. 227-238. | 1-gen-2003 | PASSERONE, ClaudioLAVAGNO, Luciano + | - |
Spatial Bounding of Complex CSG Objects / Sanna, Andrea; Montuschi, Paolo. - In: IEE PROCEEDINGS. COMPUTERS AND DIGITAL TECHNIQUES. - ISSN 1350-2387. - STAMPA. - 142:6(1995), pp. 431-439. [10.1049/ip-cdt:19952077] | 1-gen-1995 | SANNA, AndreaMONTUSCHI, PAOLO | - |
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