A Cauer-Foster Integrated Thermal Network Model for Multi-Chip SiC Power Modules Considering Temperature-Dependent Material Properties

This paper proposes a thermal network model (TNM) for multi-chip silicon carbide (SiC) power modules, which effectively incorporates temperature-dependent material properties and thermal cross-coupling (TCC) effects among parallel chips. The model adopts a hybrid three-dimensional (3-D) structure, combining a Cauer network for internal layer-wise heat conduction with a Foster network for external dissipation paths, enabling accurate and efficient electro-thermal simulations. A systematic parameter identification method is developed, leveraging finite element method (FEM) simulations to extract thermal conductance and thermal capacitance parameters through non-negative least-squares optimization and transient response fitting, with the temperature dependence of material properties fully considered. Steady-state and transient validations against FEM results show excellent consistency under different power loss levels and boundary conditions. For experimental validation, a dedicated test bench for SiC module junction temperature measurement is built, combining fiber-optic temperature sensing and thermal imaging techniques. The slight experimental deviations with a maximum error of less than 2.5 °C demonstrate that the model can accurately track the measured transient junction temperature of the module.