Archivio Istituzionale della RicercaThis paper introduces a high-voltage output-capacitorless voltage regulator designed for fast transient response to supply switching loads digital blocks directly from the high-voltage power rail. The pro- posed solution based on the current buffer Miller compensation, achieves a load current transient response of about 1.6 ns and reduces silicon area by a factor of 2.25 compared to a high-voltage Flipped Voltage Follower- based topology
A high-voltage LDO voltage regulator featuring enhanced transient response and reduced area / Serra, Jacopo; Fiori, Franco. - 1263 LNEE:(2025), pp. 12-20. (Intervento presentato al convegno SIE 2024 55th Annual Meeting of the Italian Electronics Society tenutosi a Genova (Ita) nel 26-28 June, 2024) [10.1007/978-3-031-71518-1_2].
A high-voltage LDO voltage regulator featuring enhanced transient response and reduced area
Serra,Jacopo;Fiori,Franco
2025
Abstract
This paper introduces a high-voltage output-capacitorless voltage regulator designed for fast transient response to supply switching loads digital blocks directly from the high-voltage power rail. The pro- posed solution based on the current buffer Miller compensation, achieves a load current transient response of about 1.6 ns and reduces silicon area by a factor of 2.25 compared to a high-voltage Flipped Voltage Follower- based topology
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https://hdl.handle.net/11583/2996448