Class of memristors from cascade of static nonlinear two ports with dynamic one-ports

A class of memristor circuits is obtained by cascading a static nonlinear two-port with a dynamical one-port. The terminals of the input port of the static nonlinearity represent the access nodes for each memristor in the class. The class may be splitted into two sub-classes, namely the current- and voltage-controlled memristors. Two further sets of memristors may be identified within each of such sub-classes, particularly the current- and voltage state memristors. The simplest memristor circuits from the proposed class employ solely passive two-terminal elements from circuit theory. This represents an absolute novelty in the panorama of memristor emulators. The passive elements from the class are volatile memories. However, non-volatile memory behaviour may arise in case the dynamical one-port contains active elements. The versatile nature of the circuit topologies of the proposed memristors allows the emergence of a wide variety of complex dynamical behaviours, which may enable the accomplishment of novel signal processing tasks or lead to improvements in the performance of conventional circuits.