Adopting the system theoretic tools introduced in part I, this paper gains a deep insight into the fading memory effects emerging in a non-volatile memristor under DC inputs. Experimental evidence for the history erase phenomenon is also provided here.
DC behaviour of a non-volatile memristor: part II / Ascoli, A; Tetzlaff, R; Chua, Lo; Strachan, Jp; Williams, Rs. - ELETTRONICO. - (2016), pp. 57-58. ( International Workshop on Cellular Nanoscale Networks and Their Applications (CNNA) Dresden (Germany) 23-25 August 2016).
DC behaviour of a non-volatile memristor: part II
Ascoli A;
2016
Abstract
Adopting the system theoretic tools introduced in part I, this paper gains a deep insight into the fading memory effects emerging in a non-volatile memristor under DC inputs. Experimental evidence for the history erase phenomenon is also provided here.File in questo prodotto:
| File | Dimensione | Formato | |
|---|---|---|---|
|
DC behaviour of a non-volatile memristor part II.pdf
accesso riservato
Descrizione: Contributo in Atti di convegno
Tipologia:
2a Post-print versione editoriale / Version of Record
Licenza:
Non Pubblico - Accesso privato/ristretto
Dimensione
594.51 kB
Formato
Adobe PDF
|
594.51 kB | Adobe PDF | Visualizza/Apri Richiedi una copia |
Pubblicazioni consigliate
I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
Utilizza questo identificativo per citare o creare un link a questo documento:
https://hdl.handle.net/11583/2988429
