Adopting the system theoretic tools introduced in part I, this paper gains a deep insight into the fading memory effects emerging in a non-volatile memristor under DC inputs. Experimental evidence for the history erase phenomenon is also provided here.

DC behaviour of a non-volatile memristor: part II / Ascoli, A; Tetzlaff, R; Chua, Lo; Strachan, Jp; Williams, Rs. - ELETTRONICO. - (2016), pp. 57-58. ( International Workshop on Cellular Nanoscale Networks and Their Applications (CNNA) Dresden (Germany) 23-25 August 2016).

DC behaviour of a non-volatile memristor: part II

Ascoli A;
2016

Abstract

Adopting the system theoretic tools introduced in part I, this paper gains a deep insight into the fading memory effects emerging in a non-volatile memristor under DC inputs. Experimental evidence for the history erase phenomenon is also provided here.
2016
978-3-8007-4252-3
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2988429