A Balanced Stacked GaN MMIC Power Amplifier for 26-GHz 5G applications

This work reports the design and experimental characterization of a 4 W Ka-band MMIC power amplifier in GaN/SiC technology, featuring a balanced stacked architecture. The proposed amplifier is composed of a pair of 2-stage amplifier branches, each including a single-transistor driver stage and a 2-stacked-transistor power stage. Small-signal characterization exhibits very good agreement between measurements and simulations, while system-level characterization, employing a 50 MHz instantaneous bandwidth, 10 dB PAPR 5G FR2 signal, demonstrates the very promising linearity performance of the proposed amplifier. The measured minimum ACPR is better than -27 dBc up to an average output power of 24 dBm, from 25 GHz to 27 GHz.