Machine Learning for Microcontroller Performance Screening

In safety-critical applications, microcontrollers must satisfy strict quality constraints and performances in terms of Fmax (the maximum operating frequency). Traditional speed-binning techniques are not feasible to be applied to mass production, due to the high cost of the needed test equipment. Literature has proven that data extracted from on-chip ring oscillators (ROs) can model the Fmax of integrated circuits by means of machine learning models able to predict the actual operating frequency of the devices. Those models, once trained, can be easily applied to the ROs data coming from every produced device with low effort and no need for high-cost equipment. This research aims to develop machine learning methodologies to be deployed in the MCU screening process, allowing for a more efficient and accurate Fmax estimation, as well as improved speed binning. The effectiveness of this approach has been demonstrated on a real world dataset of microcontroller data.