This paper addresses SAT-based Unbounded Model Checking based on Craig Interpolants. This recently introduced methodology is often able to outperform BDDs and other SAT-based techniques on large verification instances. Based on refutation proofs generated by SAT solvers, interpolants provide compact circuit representations of state sets, and abstract away several details non relevant for proofs. We propose three main contributions, aimed at controlling interpolant size and traversal depth. First of all, we introduce interpolant-based dynamic abstraction to reduce the support of the computed interpolant. Second, we propose new advances in interpolant compaction by redundancy removal. Both techniques rely on an effective application of the incremental SAT paradigm. Finally, we also introduce interpolant computation exploiting circuit quantification, instead of SAT refutation proofs. Experimental results are specifically oriented to prove properties, rather than disproving them (bug hunting). They show how the methodology is able to extend the applicability of interpolant based Model Checking to larger and deeper verification instances. Copyright 2006 ACM.

Stepping forward with interpolates in unbounded model checking / Cabodi, Gianpiero; Murciano, Marco; Nocco, Sergio; Quer, Stefano. - (2006), pp. 772-778. (Intervento presentato al convegno 2006 International Conference on Computer-Aided Design, ICCAD tenutosi a San Jose, CA (USA) nel 2006) [10.1109/ICCAD.2006.320119].

Stepping forward with interpolates in unbounded model checking

Cabodi, Gianpiero;Murciano, Marco;Nocco, Sergio;Quer, Stefano
2006

Abstract

This paper addresses SAT-based Unbounded Model Checking based on Craig Interpolants. This recently introduced methodology is often able to outperform BDDs and other SAT-based techniques on large verification instances. Based on refutation proofs generated by SAT solvers, interpolants provide compact circuit representations of state sets, and abstract away several details non relevant for proofs. We propose three main contributions, aimed at controlling interpolant size and traversal depth. First of all, we introduce interpolant-based dynamic abstraction to reduce the support of the computed interpolant. Second, we propose new advances in interpolant compaction by redundancy removal. Both techniques rely on an effective application of the incremental SAT paradigm. Finally, we also introduce interpolant computation exploiting circuit quantification, instead of SAT refutation proofs. Experimental results are specifically oriented to prove properties, rather than disproving them (bug hunting). They show how the methodology is able to extend the applicability of interpolant based Model Checking to larger and deeper verification instances. Copyright 2006 ACM.
2006
978-1-59593-389-8
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2981106