The PAPRICA project started in 1988 as an experimental VLSI architecture devoted to the efficient computation of data with two-dimensional structure. The main goal of the project is to develop a subsystem that could operate as an attached processing unit to a standard workstation and in perspective as a specialized processing module in dedicated systems devoted to low level image analysis, cellular neural networks emulation, DRC algorithms. The architecture has been extensively used for basic low level image analysis tasks up to optical flow computation and feature tracking, showing encouraging performance even in the first prototype version. The authors discuss the actual implementation and present a critical analysis of the project, allowing to identify some crucial points of PAPRICA design (and of array processors in general) that must be carefully considered in the case of redesign.
The PAPRICA SIMD array: Critical reviews and perspectives / Gregoretti, F.; Sansoe', C.; Reyneri, L. M.; Broggi, A.; Conte, G.. - ELETTRONICO. - (1993), pp. 309-320. (Intervento presentato al convegno 1993 International Conference on Application Specific Array Processors, ASAP 1993 tenutosi a Venice, Italy nel 25-27 October 1993) [10.1109/ASAP.1993.397154].
The PAPRICA SIMD array: Critical reviews and perspectives
Gregoretti F.;Sansoe' C.;Reyneri L. M.;Conte G.
1993
Abstract
The PAPRICA project started in 1988 as an experimental VLSI architecture devoted to the efficient computation of data with two-dimensional structure. The main goal of the project is to develop a subsystem that could operate as an attached processing unit to a standard workstation and in perspective as a specialized processing module in dedicated systems devoted to low level image analysis, cellular neural networks emulation, DRC algorithms. The architecture has been extensively used for basic low level image analysis tasks up to optical flow computation and feature tracking, showing encouraging performance even in the first prototype version. The authors discuss the actual implementation and present a critical analysis of the project, allowing to identify some crucial points of PAPRICA design (and of array processors in general) that must be carefully considered in the case of redesign.File | Dimensione | Formato | |
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https://hdl.handle.net/11583/2980225