This paper deals with a novel short circuit protection technique that is applied during fault under load (FUL) conditions occurring on IGBT devices. An experimental analysis of rugged IGBTs, which are submitted to FUL transients, has been performed dwelling upon the main stresses associated with the fault. In particular, the issues pertinent to the current transient are analysed, and the state-of-the-art regarding the protection circuit as appearing in literature is recalled and discussed. A novel circuitry is proposed aiming to strongly limit the peak of current deriving from a FUL transient, thus limiting the considerable energetic and thermal stresses onto the device. Besides, a theoretical analysis explaining the working mechanism of the proposed circuit has been carried out. Finally, the experimental results, which have been obtained by exploiting a suitable breadboard able to create FUL transients, confirm the validity and correctness of the proposed approach.
A Novel Protection Technique Devoted to the Improvement of the Short Circuit Ruggedness of IGBTs / Musumeci, S.; Pagano, R.; Raciti, A.; Belverde, G.; Guastella, C.; Melito, M.. - ELETTRONICO. - 2:(2003), pp. 1733-1738. (Intervento presentato al convegno IECON'03. 29th Annual Conference of the IEEE Industrial Electronics Society tenutosi a Roanoke, VA, USA nel 02-06 November 2003) [10.1109/IECON.2003.1280319].
A Novel Protection Technique Devoted to the Improvement of the Short Circuit Ruggedness of IGBTs
S. Musumeci;
2003
Abstract
This paper deals with a novel short circuit protection technique that is applied during fault under load (FUL) conditions occurring on IGBT devices. An experimental analysis of rugged IGBTs, which are submitted to FUL transients, has been performed dwelling upon the main stresses associated with the fault. In particular, the issues pertinent to the current transient are analysed, and the state-of-the-art regarding the protection circuit as appearing in literature is recalled and discussed. A novel circuitry is proposed aiming to strongly limit the peak of current deriving from a FUL transient, thus limiting the considerable energetic and thermal stresses onto the device. Besides, a theoretical analysis explaining the working mechanism of the proposed circuit has been carried out. Finally, the experimental results, which have been obtained by exploiting a suitable breadboard able to create FUL transients, confirm the validity and correctness of the proposed approach.File | Dimensione | Formato | |
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https://hdl.handle.net/11583/2980089