In motor drive applications, Gallium nitride (GaN) transistors are becoming widely adopted as inverter switching devices because of their advanced dynamic characteristics. In GaN FETs based half-bridge dead time reduction allows a decrease of power losses during the reverse conduction. However, switching devices in reverse conduction feature different dynamic voltage slope characteristics during the dead time depending on the switching condition. This paper explains how GaN FET reverse conduction behaves in a phase inverter leg during the dead time according to the current sign and amplitude. Then, a reduction dead time strategy that considers the voltage slope signs and the current variation of GaN FETs in the H-bridge configuration is proposed. The design criteria of the proposed strategy are explained. An experimental test on an inverter powering a BLDC motor is performed to show the resulting switching node voltage waveforms during commutations for different phase current levels. The aim is to reduce commutation losses in the reverse conduction of GaN FET-based inverter leg powering an AC motor load.

Dead Time Reduction Strategy for GaN-Based Low-Voltage Inverter in Motor Drive System / Barba, Vincenzo; Musumeci, Salvatore; Palma, Marco; Bojoi, Radu. - (2023), pp. 2385-2390. (Intervento presentato al convegno IEEE Applied Power Electronics Conference and Exposition - APEC tenutosi a Orlando Florida USA nel 19 March 2023 - 23 March 2023) [10.1109/APEC43580.2023.10131652].

Dead Time Reduction Strategy for GaN-Based Low-Voltage Inverter in Motor Drive System

Barba, Vincenzo;Musumeci, Salvatore;Bojoi, Radu
2023

Abstract

In motor drive applications, Gallium nitride (GaN) transistors are becoming widely adopted as inverter switching devices because of their advanced dynamic characteristics. In GaN FETs based half-bridge dead time reduction allows a decrease of power losses during the reverse conduction. However, switching devices in reverse conduction feature different dynamic voltage slope characteristics during the dead time depending on the switching condition. This paper explains how GaN FET reverse conduction behaves in a phase inverter leg during the dead time according to the current sign and amplitude. Then, a reduction dead time strategy that considers the voltage slope signs and the current variation of GaN FETs in the H-bridge configuration is proposed. The design criteria of the proposed strategy are explained. An experimental test on an inverter powering a BLDC motor is performed to show the resulting switching node voltage waveforms during commutations for different phase current levels. The aim is to reduce commutation losses in the reverse conduction of GaN FET-based inverter leg powering an AC motor load.
2023
978-1-6654-7539-6
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2979942
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