While the importance of parallel hardware archi- tectures has been increasing over the decades, software tends to be one step behind. In the testing and reliability field, non- commercial software is often designed with few to no parallelism in mind. In this paper, we focus on a toolchain that allows us to measure the stress metrics of large SoC through the analysis of enormous Value Change Dump files produced by the testing and simulation equipment. In this toolchain, we concentrate on speeding up the analysis and making the entire process more automatic through pipeline and parallelization techniques. We tested the resulting Burn-In test application on a real chip, developed by STMicroelectronics.

Evaluating Burn-In related metrics for large Automotive Systems-on-Chip / Calabrese, Andrea. - ELETTRONICO. - (2022), pp. 1-2. ((Intervento presentato al convegno IEEE European Test Symposium (ETS) tenutosi a Barcelona (Spain) nel 23-27 May.

Evaluating Burn-In related metrics for large Automotive Systems-on-Chip

Andrea Calabrese
2022

Abstract

While the importance of parallel hardware archi- tectures has been increasing over the decades, software tends to be one step behind. In the testing and reliability field, non- commercial software is often designed with few to no parallelism in mind. In this paper, we focus on a toolchain that allows us to measure the stress metrics of large SoC through the analysis of enormous Value Change Dump files produced by the testing and simulation equipment. In this toolchain, we concentrate on speeding up the analysis and making the entire process more automatic through pipeline and parallelization techniques. We tested the resulting Burn-In test application on a real chip, developed by STMicroelectronics.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2971407