This paper deals with the dead time selection in Gallium Nitride (GaN) FET based three-phase brushless DC motor drives. The GaN wide-bandgap (WBG) technology enables the increase of the switching frequency compared with silicon MOSFET. In inverter applications, it is necessary to insert a dead time in the switching signals, to avoid cross conduction in the inverter leg. The dead time selection is a compromise between the switching time and the quality of the inverter output waveforms. GaN FETs can operate with dead times in the range of tens of ns. In this paper the advantages of the GaN technology in the reduction of dead time in terms of output waveforms distortion and speed ripple compared with silicon MOSFET are carried out. Furthermore, an evaluation on the dead time compensation technique compared with the hardware technology reduction is investigated demonstrating the effectiveness and the saving of software and hardware resources obtained by GaN FET devices.

Dead Time Management in GaN Based Three-Phase Motor Drives / Mandrile, F.; Musumeci, S.; Palma, M.. - ELETTRONICO. - (2021). (Intervento presentato al convegno 23rd European Conference on Power Electronics and Applications, EPE 2021 ECCE Europe tenutosi a Ghent, (BE) nel 6-10 Sept. 2021).

Dead Time Management in GaN Based Three-Phase Motor Drives

Mandrile F.;Musumeci S.;
2021

Abstract

This paper deals with the dead time selection in Gallium Nitride (GaN) FET based three-phase brushless DC motor drives. The GaN wide-bandgap (WBG) technology enables the increase of the switching frequency compared with silicon MOSFET. In inverter applications, it is necessary to insert a dead time in the switching signals, to avoid cross conduction in the inverter leg. The dead time selection is a compromise between the switching time and the quality of the inverter output waveforms. GaN FETs can operate with dead times in the range of tens of ns. In this paper the advantages of the GaN technology in the reduction of dead time in terms of output waveforms distortion and speed ripple compared with silicon MOSFET are carried out. Furthermore, an evaluation on the dead time compensation technique compared with the hardware technology reduction is investigated demonstrating the effectiveness and the saving of software and hardware resources obtained by GaN FET devices.
2021
978-9-0758-1537-5
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2939906