Many beyond-CMOS technologies, based on different switching mechanisms, are arising. Field-coupled technologies are the most promising as they can guarantee an extremely low-power consumption and combine logic and memory into the same device. However, circuit-level explorations, like layout verification and analysis of the circuit performance, considering the constraints of the target technology, cannot be done using existing tools. Here, we propose a methodology to take on this challenge. We present FUNCODE (FUNction & COnnection DEtection), an algorithm that can detect element connections, functions and errors of custom-layouts and generate its corresponding VHDL netlist. It is proposed for in-plane and perpendicular Nano Magnetic Logic as a case study. FUNCODE netlists, which take into account the physical behavior of the technology, were verified using circuits with increasing complexity, from 6 up to 1400 gates with a number of layout elements varying from 200 to 2.3e6.

FUNCODE: Effective Device-to-System Analysis of Field Coupled Nanocomputing Circuit Designs / Garlando, U.; Riente, F.; Graziano, M.. - In: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS. - ISSN 0278-0070. - 40:3(2021), pp. 467-478. [10.1109/TCAD.2020.3001389]

FUNCODE: Effective Device-to-System Analysis of Field Coupled Nanocomputing Circuit Designs

Garlando U.;Riente F.;Graziano M.
2021

Abstract

Many beyond-CMOS technologies, based on different switching mechanisms, are arising. Field-coupled technologies are the most promising as they can guarantee an extremely low-power consumption and combine logic and memory into the same device. However, circuit-level explorations, like layout verification and analysis of the circuit performance, considering the constraints of the target technology, cannot be done using existing tools. Here, we propose a methodology to take on this challenge. We present FUNCODE (FUNction & COnnection DEtection), an algorithm that can detect element connections, functions and errors of custom-layouts and generate its corresponding VHDL netlist. It is proposed for in-plane and perpendicular Nano Magnetic Logic as a case study. FUNCODE netlists, which take into account the physical behavior of the technology, were verified using circuits with increasing complexity, from 6 up to 1400 gates with a number of layout elements varying from 200 to 2.3e6.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2854099