A reference-free, fully digital foreground self-calibration strategy intended to automatically tune the clock frequency of Relaxation Digital to Analog Converters (ReDACs), as demanded for linear operation, is presented in this paper. The effectiveness of the proposed approach is demonstrated by computer simulations on a 10-bit, 2MS/s ReDAC designed in 40nm CMOS and operated from a 600mV power supply voltage. After the proposed calibration, the ReDAC is shown to operate near the optimal clock frequency achieving 0.98 LSB maximum INL, 1.00 LSB maximum DNL and 9.06 ENOB.

Relaxation Digital-to-Analog Converter with Foreground Digital Self-Calibration / Crovetti, PAOLO STEFANO; Rubino, Roberto; Musolino, Francesco. - STAMPA. - (2020). (Intervento presentato al convegno 2020 IEEE International Symposium on Circuits and Systems (ISCAS2020) tenutosi a Sevilla (ES) nel 10-21 Oct. 2020) [10.1109/ISCAS45731.2020.9180696].

Relaxation Digital-to-Analog Converter with Foreground Digital Self-Calibration

Paolo Crovetti;Roberto Rubino;Francesco Musolino
2020

Abstract

A reference-free, fully digital foreground self-calibration strategy intended to automatically tune the clock frequency of Relaxation Digital to Analog Converters (ReDACs), as demanded for linear operation, is presented in this paper. The effectiveness of the proposed approach is demonstrated by computer simulations on a 10-bit, 2MS/s ReDAC designed in 40nm CMOS and operated from a 600mV power supply voltage. After the proposed calibration, the ReDAC is shown to operate near the optimal clock frequency achieving 0.98 LSB maximum INL, 1.00 LSB maximum DNL and 9.06 ENOB.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2848100