This paper reviews the results of recent researches aimed to extend the standard-cell based digital design flow to analog building blocks, so that to enhance scalability, reconfigurability and portability across technology nodes and to reduce design effort, time-to-market and costs. In this framework, the application of the proposed fully digital design approach to a wake up oscillator and to a Digital-to-Analog Converter, which are two building blocks widely employed in IoT sensor nodes, is illustrated in detail.

Ultra-Low Power and Minimal Design Effort Interfaces for the Internet of Things: Invited paper / Aiello, Orazio; Crovetti, Paolo; Alioto, Massimo. - ELETTRONICO. - (2019), pp. 1-4. (Intervento presentato al convegno 2019 IEEE International Circuits and Systems Symposium (ICSyS) tenutosi a Kuantan, Pahang, Malaysia, Malaysia nel 18-19 Sept. 2019) [10.1109/ICSyS47076.2019.8982478].

Ultra-Low Power and Minimal Design Effort Interfaces for the Internet of Things: Invited paper

Aiello, Orazio;Crovetti, Paolo;
2019

Abstract

This paper reviews the results of recent researches aimed to extend the standard-cell based digital design flow to analog building blocks, so that to enhance scalability, reconfigurability and portability across technology nodes and to reduce design effort, time-to-market and costs. In this framework, the application of the proposed fully digital design approach to a wake up oscillator and to a Digital-to-Analog Converter, which are two building blocks widely employed in IoT sensor nodes, is illustrated in detail.
2019
978-1-7281-0024-1
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2816532