On Partial Response Signaling for MIMO Equalization on Multi-Gbit/s Electrical Interconnects

Because of its ability to deal with intersymbol interference (ISI) and crosstalk (XT) over mutually coupled electrical interconnects, multiple-input multiple-output (MIMO) decision feedback equalization (DFE) has proven to be a promising low-cost solution for achieving multi-Gbit/s wireline communication on- and off-chip. However, not only does the channel become very sensitive to manufacturing tolerances at very high symbol rates, the latency in the feedback loop becomes prohibitively large as well. Whereas the former issue has been addressed by adopting a stochastic MIMO approach where (part of) the equalization filters depend on the channel statistics rather than on the actual channel, we tackle in this paper the latency issue by setting to zero the first N taps of the feedback filters. Moreover, we show that precoded partial response (PR) signaling can improve the performance of the resulting scheme, although the achieved gain is smaller than in the case of single-input single-output (SISO) equalization.