A mixed-signal ASIC developed to readout silicon photomultipliers (SiPM) at low temperature is presented. The chip is designed in a 110 nm CMOS technology. Both sin- gle photon counting and Time-over-Threshold (ToT) operating modes are supported. The ToT modality is useful when many photons pile-up to yield a continuous signal. In single photon counting mode an event rate of up to 5 MHz per channel can be accommodated. The time resolution is 50 ps and the target power consumption is less tha 5 mW per channel. The architecture of a first 32-channel prototype is described. Dedicated test structures to qualify critical building blocks at cryogenic temperature have also been deployed.
A low-power mixed-signal ASIC for SiPM readout at low temperature / Kugathasan, Ramshan. - In: IEEE TRANSACTIONS ON NUCLEAR SCIENCE. - ISSN 1558-1578. - ELETTRONICO. - (2020). (Intervento presentato al convegno Nuclear Science Symposium tenutosi a Manchester (UK) nel 26 October - 2 November 2019) [10.1109/NSS/MIC42101.2019.9059994].
A low-power mixed-signal ASIC for SiPM readout at low temperature
Ramshan Kugathasan
2020
Abstract
A mixed-signal ASIC developed to readout silicon photomultipliers (SiPM) at low temperature is presented. The chip is designed in a 110 nm CMOS technology. Both sin- gle photon counting and Time-over-Threshold (ToT) operating modes are supported. The ToT modality is useful when many photons pile-up to yield a continuous signal. In single photon counting mode an event rate of up to 5 MHz per channel can be accommodated. The time resolution is 50 ps and the target power consumption is less tha 5 mW per channel. The architecture of a first 32-channel prototype is described. Dedicated test structures to qualify critical building blocks at cryogenic temperature have also been deployed.File | Dimensione | Formato | |
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https://hdl.handle.net/11583/2749052