SystemC is a widespread language for developing SoC designs. %Unfortunately, its simulation performance is heavily affected by a strictly sequential scheduler that slows down verification and time-to-market for new designs. Unfortunately, most SystemC simulators are based on a strictly sequential scheduler that heavily limits their performance, impacting verification schedules and time-to-market of new designs. Parallelizing SystemC simulation %requires a thorough entails a complete re-design of the simulator kernel for the specific target parallel architectures. This paper proposes an automatic methodology to generate a parallel SystemC simulator kernel, exploiting the massive parallelism of GP-GPU architectures. Our solution leverages static scheduling to reduce synchronization overheads. The generated simulator code targets both \cuda\ and \opencl\ libraries, to boost scalability and provide support for multiple GP-GPU architectures. % We find experimentally that we achieve a compression of simulation time by one order of magnitude on these targets. Finally, the paper compares the performance of our solution on \cuda\ vs. \opencl\ platforms, with the goal of investigating advantages and drawbacks that the two thread management libraries offer to concurrent SystemC simulation.

SystemC simulation on GP-GPUs: CUDA vs. OpenCL / N., Bombieri; Vinco, Sara; V., Bertacco; D., Chatterje. - (2012), pp. 343-352. (Intervento presentato al convegno ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) tenutosi a Tampere, Finland nel 7-12 October) [10.1145/2380445.2380500].

SystemC simulation on GP-GPUs: CUDA vs. OpenCL

VINCO, SARA;
2012

Abstract

SystemC is a widespread language for developing SoC designs. %Unfortunately, its simulation performance is heavily affected by a strictly sequential scheduler that slows down verification and time-to-market for new designs. Unfortunately, most SystemC simulators are based on a strictly sequential scheduler that heavily limits their performance, impacting verification schedules and time-to-market of new designs. Parallelizing SystemC simulation %requires a thorough entails a complete re-design of the simulator kernel for the specific target parallel architectures. This paper proposes an automatic methodology to generate a parallel SystemC simulator kernel, exploiting the massive parallelism of GP-GPU architectures. Our solution leverages static scheduling to reduce synchronization overheads. The generated simulator code targets both \cuda\ and \opencl\ libraries, to boost scalability and provide support for multiple GP-GPU architectures. % We find experimentally that we achieve a compression of simulation time by one order of magnitude on these targets. Finally, the paper compares the performance of our solution on \cuda\ vs. \opencl\ platforms, with the goal of investigating advantages and drawbacks that the two thread management libraries offer to concurrent SystemC simulation.
2012
9781450314268
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2529506
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