FPGA-based IP-cores library for advanced image processing in space applications

Nowadays, all space agencies have increased their research efforts in order to enhance the success rate of space exploration missions. In particular, a hot research topic is the guided landing on planets. Future space missions will increasingly adopt Video Based Navigation (VBN) systems to assist the entry, descent and landing (EDL) phase of space modules (e.g., spacecrafts), enhancing the precision of automatic EDL systems. Since the EDL system has real-time constraints, the VBN system must work at high speed. Thus, we have developed a library of FPGA-based IP-cores useful to accelerate the image processing tasks involved in VBN systems. This paper presents a possible use of these IP-cores to implement Alpha-chain: an FPGA-based system able to extract the relative pose (i.e., relative position and speed between two time instants) of a spacecraft during the descending phase on the target planet. The proposed hardware architecture ensures high accuracy of the extracted relative pose, and real-time performances.