With the scaling of CMOS technology, critical paths in digital circuits have become largely sensitive to process, voltage and temperature variations as well as to aging effects, generally resulting into a mismatch between the simulated path delay of the circuit obtained with CAD tools and the actual path delay on the manufactured chip. In order to solve this issue and to also avoid conservative strategies based on increasing time margins, adaptive techniques are the most desirable solution because they should automatically sense and correct timing variations online. Implementing such adaptive strategies requires accurate, high resolution and compact delay measurement devices. In this work we propose an effective, fully-digital, online delay measurement circuit that can be entirely implemented in a standard cell technology without the need of custom elements. Our design provides low-cost multi-paths delay monitoring while achieving high accuracy of the measurements (in the order of 30ps).

A Fully Standard-Cell Delay Measurement Circuit for Timing Variability Detection / Sassone, Alessandro; Petricca, Massimo; Poncino, Massimo; Macii, Enrico. - (2013), pp. 239-242. ((Intervento presentato al convegno 23rd International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS), 2013 tenutosi a Karlsruhe, Germany nel 9-11 September, 2013.

A Fully Standard-Cell Delay Measurement Circuit for Timing Variability Detection

SASSONE, ALESSANDRO;PETRICCA, MASSIMO;PONCINO, MASSIMO;MACII, Enrico
2013

Abstract

With the scaling of CMOS technology, critical paths in digital circuits have become largely sensitive to process, voltage and temperature variations as well as to aging effects, generally resulting into a mismatch between the simulated path delay of the circuit obtained with CAD tools and the actual path delay on the manufactured chip. In order to solve this issue and to also avoid conservative strategies based on increasing time margins, adaptive techniques are the most desirable solution because they should automatically sense and correct timing variations online. Implementing such adaptive strategies requires accurate, high resolution and compact delay measurement devices. In this work we propose an effective, fully-digital, online delay measurement circuit that can be entirely implemented in a standard cell technology without the need of custom elements. Our design provides low-cost multi-paths delay monitoring while achieving high accuracy of the measurements (in the order of 30ps).
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/2519028
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