Performance evaluation and improvement of the CPU–CAN controller interface for low-jitter communication

The effectiveness and quality of several distributed control loops are heavily affected by the ability to reduce jitters. This goal can hardly be achieved without understanding all possible causes that can introduce time fluctuations in the communication path between the processor, running the control algorithms, and the (remote) peripheral devices. This is because any of them, in fact, may worsen the timing accuracy of the system as a whole. After the most well-known sources of jitters are put under control, other aspects become more and more important for the overall behavior of the system. This paper tackles the problem of time fluctuations introduced by the interface between the Central Processing Unit (CPU) and the CAN controller in a typical off-the-shelf, single-chip microcontroller and shows why and how they should be considered and handled carefully.