Communication protocols can be modeled as finite state machines, a formalism commonly used in digital circuit design. Sophisticated and efficient simulation techniques have been developed to help integrated circuit designers. In this paper, we propose an approach to the verification and performance evaluation of communication protocols and, in general, of entire computer networks based on such techniques. Preliminary results seem to indicate the feasibility of the method.

Hardware simulation: a flexible approach to verification and performance evaluation of communication protocols / Baldi, Mario; Macii, Enrico; Poncino, Massimo. - (1995), pp. 945-948. ( IEEE 29th Asilomar Conference on Signals, Systems and Computers Pacific Grove, CA (USA) Oct. 30 1995-Nov. 1 1995) [10.1109/ACSSC.1995.540839].

Hardware simulation: a flexible approach to verification and performance evaluation of communication protocols

BALDI, MARIO;MACII, Enrico;PONCINO, MASSIMO
1995

Abstract

Communication protocols can be modeled as finite state machines, a formalism commonly used in digital circuit design. Sophisticated and efficient simulation techniques have been developed to help integrated circuit designers. In this paper, we propose an approach to the verification and performance evaluation of communication protocols and, in general, of entire computer networks based on such techniques. Preliminary results seem to indicate the feasibility of the method.
1995
0818673702
File in questo prodotto:
Non ci sono file associati a questo prodotto.
Pubblicazioni consigliate

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/1870531
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo