During these Last years, the software radio has emerged as the only way to design a multimode, multistandard transceivers that support, everywhere, any communication standard. Software radio, however, requires not only powerful transceiver architectures, but also efflcient digital signal processing algorithms. In this paper a method to design and implement a very efficient decimation fllter for a Sigma-Delta converter is proposed. The main idea of this article is to free the positions of the zeros of the classical decimation Sinc-Alter so to attain a high selective frequency behaviour. The filtering stage is realized by a classical sinc-fllter cascaded with two other fllters obtained from the flrst one by rotating its zeros by two opposite angles. The whole cascade yields to a simple recursive structure with a frequency behaviour more selective than a Sinc-Alter hound the noise fold frequency bands. Although the design method may be extended to a multistage implementation, the fllter design proposed in this article deals with the flrst flltering stage. Since the designed fllter eliminates the most part of the quantization noise, the following filtering stages may be designed with relaxed speciflcations adopting classical fllter design methods.

An Efficient Decimation Sinc-Filter Design for Software Radio Applications / Laddomada, Massimiliano; LO PRESTI, Letizia; Mondin, Marina; C., Ricchiuto. - STAMPA. - (2001), pp. 337-339. ((Intervento presentato al convegno 2001 IEEE Third Workshop on Signal Processing Advances in Wireless Communications, 2001 (SPAWC '01) tenutosi a Taoyuan (Taiwan) nel 20 Mar 2001-23 Mar 2001 [10.1109/SPAWC.2001.923919].

An Efficient Decimation Sinc-Filter Design for Software Radio Applications

LADDOMADA, Massimiliano;LO PRESTI, Letizia;MONDIN, Marina;
2001

Abstract

During these Last years, the software radio has emerged as the only way to design a multimode, multistandard transceivers that support, everywhere, any communication standard. Software radio, however, requires not only powerful transceiver architectures, but also efflcient digital signal processing algorithms. In this paper a method to design and implement a very efficient decimation fllter for a Sigma-Delta converter is proposed. The main idea of this article is to free the positions of the zeros of the classical decimation Sinc-Alter so to attain a high selective frequency behaviour. The filtering stage is realized by a classical sinc-fllter cascaded with two other fllters obtained from the flrst one by rotating its zeros by two opposite angles. The whole cascade yields to a simple recursive structure with a frequency behaviour more selective than a Sinc-Alter hound the noise fold frequency bands. Although the design method may be extended to a multistage implementation, the fllter design proposed in this article deals with the flrst flltering stage. Since the designed fllter eliminates the most part of the quantization noise, the following filtering stages may be designed with relaxed speciflcations adopting classical fllter design methods.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/1663214
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