This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for EMC and signal integrity simulations. A practical modeling process is proposed and applied to some example devices. The modeling process is simple and efficient, and it yields models performing at a very high accuracy level
Macromodeling of Digital I/O Ports for System EMC Assessment / Stievano, I.S., Chen, Z., Becker, D., Canavero, F., Katopis, G., Maio, I.A.. - STAMPA. - (2002), pp. 1044-1048. (Design, Automation and Test in Europe Conference, DATE Paris (France) Mar. 4-8, 2002) [10.1109/DATE.2002.998429].
Macromodeling of Digital I/O Ports for System EMC Assessment
STIEVANO, IGOR SIMONE;CANAVERO, Flavio;MAIO, Ivano Adolfo
2002
Abstract
This paper addresses the development of accurate and efficient behavioral models of digital integrated circuit input and output ports for EMC and signal integrity simulations. A practical modeling process is proposed and applied to some example devices. The modeling process is simple and efficient, and it yields models performing at a very high accuracy level| File | Dimensione | Formato | |
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cnf-2002-date-rbf-IEEE.pdf
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https://hdl.handle.net/11583/1418295
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