Prediction of RF interference effects in smart power integrated circuits

This paper deals with the susceptibility of integrated circuits (ICs) to conducted RF interference. In particular, the propagation and effects of RF interference in smart power ICs is studied. A new method, developed to identify a parasitic substrate-coupling network in VLSI devices, has been customized for a smart power technology process. The layout view of a specific circuit is elaborated in order to extract a netlist composed of the circuits of the die surface and the substrate parasitic network. By using a SPICE-like simulator, circuit simulations have been performed and the prediction of RF interference effects on the behavior of a bandgap circuit is obtained. Various layouts of the same test circuit have been considered and the effectiveness of shielding substrate contacts is presented.