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Layer-wise compressive training for convolutional neural networks
2019 Grimaldi, Matteo; Tenace, Valerio; Calimera, Andrea
Quasi-exact logic functions through classification trees
2018 Tenace, Valerio; Calimera, Andrea
Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs
2016 Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo
Ultra-low power circuits using graphene p-n junctions and adiabatic computing
2015 Miryala, Sandeep; Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo
Row-Based Body-Bias Assignment for Dynamic Thermal Clock-Skew Compensation
2014 Tenace, Valerio; Miryala, Sandeep; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo
| Citazione | Data di pubblicazione | Autori | File |
|---|---|---|---|
| Layer-wise compressive training for convolutional neural networks / Grimaldi, Matteo; Tenace, Valerio; Calimera, Andrea. - In: FUTURE INTERNET. - ISSN 1999-5903. - 11:1(2019). [10.3390/fi11010007] | 1-gen-2019 | Grimaldi, MatteoTenace, ValerioCalimera, Andrea | futureinternet-11-00007.pdf |
| Quasi-exact logic functions through classification trees / Tenace, Valerio; Calimera, Andrea. - In: INTEGRATION. - ISSN 0167-9260. - 63:(2018), pp. 248-255. [10.1016/j.vlsi.2018.06.007] | 1-gen-2018 | Tenace, ValerioCalimera, Andrea | 1-s2.0-S0167926017307903-main.pdf |
| Quasi-Adiabatic Logic Arrays for Silicon and Beyond-Silicon Energy-Efficient ICs / Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo. - In: IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS. - ISSN 1549-7747. - STAMPA. - 63:12(2016), pp. 1111-1115. [10.1109/TCSII.2016.2624145] | 1-gen-2016 | TENACE, VALERIOCALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO | TCSII2624145.pdf; 07728047.pdf |
| Ultra-low power circuits using graphene p-n junctions and adiabatic computing / Miryala, Sandeep; Tenace, Valerio; Calimera, Andrea; Macii, Enrico; Poncino, Massimo. - In: MICROPROCESSORS AND MICROSYSTEMS. - ISSN 0141-9331. - ELETTRONICO. - 39:8(2015), pp. 962-972. [10.1016/j.micpro.2015.05.018] | 1-gen-2015 | MIRYALA, SANDEEPTENACE, VALERIOCALIMERA, ANDREAMACII, EnricoPONCINO, MASSIMO | main.pdf; 1-s2.0-S0141933115000708-main.pdf |
| Row-Based Body-Bias Assignment for Dynamic Thermal Clock-Skew Compensation / Tenace, Valerio; Miryala, Sandeep; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - In: MICROELECTRONICS JOURNAL. - ISSN 0959-8324. - 45:5(2014), pp. 530-538. [10.1016/j.mejo.2013.11.013] | 1-gen-2014 | TENACE, VALERIOMIRYALA, SANDEEPCALIMERA, ANDREAMACII, AlbertoMACII, EnricoPONCINO, MASSIMO | - |