A 0.012-mm2 0.244-pJ/bit successive approximation register analog-to-digital converter-based true random number generator for Internet of Things applications in a 65-nm complementary metal–oxide–semiconductor

This paper proposes a true random number generator (TRNG) based on a successive approximation register (SAR) analog-to-digital converter (ADC). A top-plate sampling SAR ADC structure and a new MSB-isolation switch scheme (MISS) are combined to achieve low-power operation and small area occupancy at the same time. When the SAR ADC has completed its conversion, a secondary firing of the comparator measures the remaining signal. This 1-bit quantized residue serves as the true random sequence, thus eliminating the need for extra circuitry in the TRNG. A 65-nm prototype of the proposed TRNG was found to occupy an area of 0.012 mm2 and successfully passed all the National Institute of Standards and Technology (NIST) tests without post-processing. It achieved a figure-of-merit of 0.244 pJ/bit for a 1 Mb/s random sequence with a 0.8-V power supply. Its resilience to power noise injection attacks was also verified.