During the next Long Shutdown (LS3) of the LHC, planned for 2026, the innermost three layers of the ALICE Inner Tracking System will be replaced by a new vertex detector composed of curved ultra-thin monolithic silicon sensors. The R&D initiative on monolithic sensors of the CERN Experimental Physics Department, in cooperation with the ALICE ITS3 upgrade project, prepared the first submission of chip designs in the TPSCo 65 nm technology, called MLR1 (Multi Layer Reticle). It contains four different test structures with different process splits and pixel designs. These proceedings illustrate the first validation of the technology in terms of pixel performance and radiation hardness.

Validation of the 65 nm TPSCo CMOS imaging technology for the ALICE ITS3 / Ferrero, C.; on behalf of the ALICE, Collaboration. - In: JOURNAL OF INSTRUMENTATION. - ISSN 1748-0221. - STAMPA. - 19:04(2024). [10.1088/1748-0221/19/04/c04043]

Validation of the 65 nm TPSCo CMOS imaging technology for the ALICE ITS3

Ferrero, C.;
2024

Abstract

During the next Long Shutdown (LS3) of the LHC, planned for 2026, the innermost three layers of the ALICE Inner Tracking System will be replaced by a new vertex detector composed of curved ultra-thin monolithic silicon sensors. The R&D initiative on monolithic sensors of the CERN Experimental Physics Department, in cooperation with the ALICE ITS3 upgrade project, prepared the first submission of chip designs in the TPSCo 65 nm technology, called MLR1 (Multi Layer Reticle). It contains four different test structures with different process splits and pixel designs. These proceedings illustrate the first validation of the technology in terms of pixel performance and radiation hardness.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2988169