The LiTE-DTU: a data conversion and compression ASIC for the readout of the CMS Electromagnetic Calorimeter

The High-Luminosity phase of operation of the CERN LHC collider (HL-LHC) will pose new challenges to the detectors and their readout electronics. In particular, the CMS barrel electromagnetic calorimeter will require a full redesign of the electronic readout chain in order to cope with the increase in luminosity and trigger rate. In this framework, a new Application Specific Integrated Circuit (ASIC) integrating A/D conversion, lossless data compression and high speed transmission has been developed and tested. The ASIC, named LiTE-DTU, is designed in a commercial CMOS 65 nm process and embeds two 12-bit, 160 MS/s Analog to Digital Converters (ADCs), a data selection and compression logic, and a 1.28 Gb/s output serial link. The high-speed 1.28 GHz clock is generated internally from the 160 MHz input by a clock multiplication Phase-Locked Loop (PLL). The circuit has been designed implementing radiation tolerant techniques in order to work in the harsh environment of the HL-LHC upgrade. The LiTE-DTU is currently in the pre-production phase. A sample of 600 chips has been tested and incorporated into front end boards for systems performance testing.