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EnglishOver the past two decades, it is evident that there have been significant improvements (and it is expected to) in CMOS digital circuits when compared against analog building block performance. Digital circuits have been taking advantage of CMOS technology scaling in terms of speed, power consumption, and cost, while the techniques running behind the analog signal processing are still lagging. There has been an increasing trend in finding alternative IC design strategies to implement analog functions exploiting digital-in-concept design methodologies to decrease this historical gap. This idea of re-thinking analog functions in digital terms has shown that Analog ICs blocks can also avail of the feature-size shrinking and energy efficiency of new technologies. This poster shows the advanced of this field in the above scenario, proposing new digital-based analog blocks and proving their performance through silicon measurements.
Digital-based analog processing in nanoscale CMOS ICs for IoT applications / Pedro, Toledo; Klimach, Hamilton; Crovetti, Paolo Stefano. - ELETTRONICO. - (2020). ((Intervento presentato al convegno 10th IEEE CASS Rio Grande do Sul Workshop tenutosi a Porto Alegre nel November 10-13, 2020.
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| Titolo: | Digital-based analog processing in nanoscale CMOS ICs for IoT applications | |
| Autori: | ||
| Data di pubblicazione: | 2020 | |
| Abstract: | Over the past two decades, it is evident that there have been significant improvements (and it is expected to) in CMOS digital circuits when compared against analog building block performance. Digital circuits have been taking advantage of CMOS technology scaling in terms of speed, power consumption, and cost, while the techniques running behind the analog signal processing are still lagging. There has been an increasing trend in finding alternative IC design strategies to implement analog functions exploiting digital-in-concept design methodologies to decrease this historical gap. This idea of re-thinking analog functions in digital terms has shown that Analog ICs blocks can also avail of the feature-size shrinking and energy efficiency of new technologies. This poster shows the advanced of this field in the above scenario, proposing new digital-based analog blocks and proving their performance through silicon measurements. | |
| Appare nelle tipologie: | 4.3 Poster |
File in questo prodotto:
| File | Descrizione | Tipologia | Licenza | |
|---|---|---|---|---|
| CASSW_RS.pdf | Post-print non editoriale | 2. Post-print / Author's Accepted Manuscript | PUBBLICO - Tutti i diritti riservati | Visibile a tuttiVisualizza/Apri |
http://hdl.handle.net/11583/2852719
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