This letter deals with the compact modeling of the I-V characteristics of single crystalline ZnO nanowires (NW) attached to two metal electrodes (Pt and Ag). Starting from the standard model of electron transport in these structures based on the series combination of two back-to-back Schottky diodes, three different approaches which account for the role played by the NW series resistance are presented. The first approach considers a fixed potential drop across the NW, the second one involves the solution to the problem of a diode with linear and nonlinear series resistances using the Lambert W function, and the third one consists in a behavioral model with continuous first derivative suitable for circuit simulation environments. In the three cases, the proposed solutions are consistent with the observed electrical constraints both at low (linear I-V relationship) and high (current saturation) voltages.

Compact modeling of the I-V characteristics of ZnO nanowires including nonlinear series resistance effects / Miranda, E.; Milano, G.; Ricciardi, C.. - In: IEEE TRANSACTIONS ON NANOTECHNOLOGY. - ISSN 1536-125X. - ELETTRONICO. - 19:(2020), pp. 297-300. [10.1109/TNANO.2020.2981214]

Compact modeling of the I-V characteristics of ZnO nanowires including nonlinear series resistance effects

Miranda E.;Milano G.;Ricciardi C.
2020

Abstract

This letter deals with the compact modeling of the I-V characteristics of single crystalline ZnO nanowires (NW) attached to two metal electrodes (Pt and Ag). Starting from the standard model of electron transport in these structures based on the series combination of two back-to-back Schottky diodes, three different approaches which account for the role played by the NW series resistance are presented. The first approach considers a fixed potential drop across the NW, the second one involves the solution to the problem of a diode with linear and nonlinear series resistances using the Lambert W function, and the third one consists in a behavioral model with continuous first derivative suitable for circuit simulation environments. In the three cases, the proposed solutions are consistent with the observed electrical constraints both at low (linear I-V relationship) and high (current saturation) voltages.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/2842126