A mixed-signal ASIC for timing and energy measurements with radiation detectors is described. The chip embeds 64 channels, each of which features a charge-sensitive amplifier followed by a dual-shaper coupled to low-offset discriminators. A versatile back-end, incorporating low-power Time to Digital Converters and Wilkinson Analog to Digital Converters with derandomizing buffers allows to encode both the time of arrival and the charge of the input signal. The ASIC is designed for a maximum detector capacitance of 100 pF and an event rate in excess of 60 kHz per channel. A peak detector samples the input signal with an excellent linearity in the range 5-55 fC. Charge digitization with Time-over-Threshold is also supported to extend the dynamic range. Fabricated in a 110 nm CMOS process, the chip dissipates 10 mW/channel. The ASIC was primarily developed to readout the cylindrical GEM detector of the BESIII experiment. For its characteristics it can serve however a broad class of radiation sensors, including silicon microstrip detectors.

TIGER: A front-end ASIC for timing and energy measurements with radiation detectors / Rivetti, A.; Alexeev, M.; Bugalho, R.; Cossio, F.; Da Rocha Rolo, M. D.; Di Francesco, A.; Greco, M.; Cheng, W.; Maggiora, M.; Marcello, S.; Mignone, M.; Varela, J.; Wheadon, R.. - In: NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH. SECTION A, ACCELERATORS, SPECTROMETERS, DETECTORS AND ASSOCIATED EQUIPMENT. - ISSN 0168-9002. - ELETTRONICO. - 924:(2019), pp. 181-186. ((Intervento presentato al convegno 11th International Hiroshima Symposium on Development and Application of Semiconductor Tracking Detectors [10.1016/j.nima.2018.09.010].

TIGER: A front-end ASIC for timing and energy measurements with radiation detectors

Cossio, F.;Cheng, W.;
2019

Abstract

A mixed-signal ASIC for timing and energy measurements with radiation detectors is described. The chip embeds 64 channels, each of which features a charge-sensitive amplifier followed by a dual-shaper coupled to low-offset discriminators. A versatile back-end, incorporating low-power Time to Digital Converters and Wilkinson Analog to Digital Converters with derandomizing buffers allows to encode both the time of arrival and the charge of the input signal. The ASIC is designed for a maximum detector capacitance of 100 pF and an event rate in excess of 60 kHz per channel. A peak detector samples the input signal with an excellent linearity in the range 5-55 fC. Charge digitization with Time-over-Threshold is also supported to extend the dynamic range. Fabricated in a 110 nm CMOS process, the chip dissipates 10 mW/channel. The ASIC was primarily developed to readout the cylindrical GEM detector of the BESIII experiment. For its characteristics it can serve however a broad class of radiation sensors, including silicon microstrip detectors.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11583/2730181
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