Temperature has traditionally been a key parameter to take into account during the many stages of IC design flows, and in particular, during the sign-off phases of critical circuit components like the Clock Distribution Networks (CDNs). While for old technologies this task was accomplished by means of worst case corner-based static analysis, the advent of nanometric CMOS technologies made this approach intrinsically inadequate. This paper provides a detailed analysis of clock skew variations induced by non-uniform thermal profiles on tree-like CDNs. Using a dedicated simulation framework, we characterized the complex thermal effects that metal interconnects and buffers under inverted temperature dependence (ITD) may induce on the clock tree. Experiments conducted on a synthetic, thermal-programmable benchmark underline the presence of unexpected behaviors that standard tools are not able to catch.

Modeling and Characterization of Thermally-Induced Skew on Clock Distribution Networks of Nanometric ICs / Sassone, Alessandro; Liu, Wei; Calimera, Andrea; Macii, Alberto; Macii, Enrico; Poncino, Massimo. - In: MICROELECTRONICS JOURNAL. - ISSN 0959-8324. - 44:11(2013), pp. 970-976. [10.1016/j.mejo.2012.07.007]

Modeling and Characterization of Thermally-Induced Skew on Clock Distribution Networks of Nanometric ICs

SASSONE, ALESSANDRO;LIU, WEI;CALIMERA, ANDREA;MACII, Alberto;MACII, Enrico;PONCINO, MASSIMO
2013

Abstract

Temperature has traditionally been a key parameter to take into account during the many stages of IC design flows, and in particular, during the sign-off phases of critical circuit components like the Clock Distribution Networks (CDNs). While for old technologies this task was accomplished by means of worst case corner-based static analysis, the advent of nanometric CMOS technologies made this approach intrinsically inadequate. This paper provides a detailed analysis of clock skew variations induced by non-uniform thermal profiles on tree-like CDNs. Using a dedicated simulation framework, we characterized the complex thermal effects that metal interconnects and buffers under inverted temperature dependence (ITD) may induce on the clock tree. Experiments conducted on a synthetic, thermal-programmable benchmark underline the presence of unexpected behaviors that standard tools are not able to catch.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/2519011
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