This paper deals with the reduction of the conducted electromagnetic emissions of microcontrollers caused by the core block switching. The relationship between the conducted emission at the printed circuit board level and the sources of switching noise at the chip level is evaluated through the analysis of an equivalent circuit that comprises an electric model of the internal building blocks of a microcontroller, themodel of its package, and that of the board. Themodel of the integrated circuit is derived on the basis of functional specifications and technology parameters so that it can be extracted before chip manufacturing. By using this model, and knowing the electromagnetic emission limits to be met, the upper bound of the power supply current spectra of the core logic blocks is evaluated and the effectiveness of common spectrum shaping techniques, like the clock-skewing method or the spread-spectrum clock modulation, is discussed.

Chip-Level Design Constraints to Comply With Conducted Electromagnetic Emission Specifications / Musolino, Francesco; VILLAVICENCIO AREVALO, YAMARITA DEL CARMEN; Fiori, Franco. - In: IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY. - ISSN 0018-9375. - STAMPA. - 54:5(2012), pp. 1137-1146. [10.1109/TEMC.2012.2195665]

Chip-Level Design Constraints to Comply With Conducted Electromagnetic Emission Specifications

MUSOLINO, FRANCESCO;VILLAVICENCIO AREVALO, YAMARITA DEL CARMEN;FIORI, Franco
2012

Abstract

This paper deals with the reduction of the conducted electromagnetic emissions of microcontrollers caused by the core block switching. The relationship between the conducted emission at the printed circuit board level and the sources of switching noise at the chip level is evaluated through the analysis of an equivalent circuit that comprises an electric model of the internal building blocks of a microcontroller, themodel of its package, and that of the board. Themodel of the integrated circuit is derived on the basis of functional specifications and technology parameters so that it can be extracted before chip manufacturing. By using this model, and knowing the electromagnetic emission limits to be met, the upper bound of the power supply current spectra of the core logic blocks is evaluated and the effectiveness of common spectrum shaping techniques, like the clock-skewing method or the spread-spectrum clock modulation, is discussed.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11583/2498604
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