Carry-save multipliers require an adder at the last step to convert the carry-sum representation of the most significant half of the result into a non-redundant form. This paper presents n×n multiplication schemes where this conversion is performed with a circuit operating in parallel with the carry-save array. The most relevant feature of the proposed multipliers is that the full 2n-bit result is produced, unlike similar multiplication schemes presented in the literature
Carry-Save Multiplication Schemes without Final Addition / CIMINIERA L.; MONTUSCHI P.. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - STAMPA. - C-45:9(1996), pp. 1050-1055. [10.1109/12.537128]
Titolo: | Carry-Save Multiplication Schemes without Final Addition | |
Autori: | ||
Data di pubblicazione: | 1996 | |
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Digital Object Identifier (DOI): | http://dx.doi.org/10.1109/12.537128 | |
Appare nelle tipologie: | 1.1 Articolo in rivista |
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http://hdl.handle.net/11583/1402778